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AM79C976 датащи(PDF) 141 Page - Advanced Micro Devices

номер детали AM79C976
подробное описание детали  PCnet-PRO??10/100 Mbps PCI Ethernet Controller
PDF  309 Pages
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производитель  AMD [Advanced Micro Devices]
домашняя страница  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C976 датащи(HTML) 141 Page - Advanced Micro Devices

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8/01/00
Am79C976
141
P R E L I M INARY
17-16
XMTSP
Transmit Start Point. XMTSP controls the point at which preamble transmission attempts to
commence in relation to the number of bytes written to the MAC Transmit FIFO for the current
transmit frame. When the entire frame is in the MAC Transmit FIFO, transmission will start
regardless of the value in XMTSP.
If any of REX_UFLO, REX_RTRY, or RTRY_LCOL are set, no frame data will be overwritten until
the frame has been transmitted or discarded. Otherwise, no data will be overwritten until at least
64 bytes have been transmitted.
Note that when the No Underflow (NOUFLO) bit (BCR18, bit 11) is set to 1 or XMTSP = 11b,
transmission will not start until the complete frame has been copied into the Transmit FIFO. This
mode is useful in a system where high latencies cannot be avoided.
The default value for XMTSP[1:0] is 01b (64 bytes).
This field is an alias of CSR80, bits 11:10.
15-10
RES
Reserved locations. Written as zeros and read as undefined.
9-8
XMTFW
Transmit FIFO Watermark. XMTFW specifies the point at which transmit DMA is requested, based
upon the number of bytes that could be written to the Transmit FIFO without FIFO overflow.
Transmit DMA is requested when the number of bytes specified by XMTFW could be written to the
FIFO without causing Transmit FIFO overflow, and the internal state machine has reached a point
where the Transmit FIFO is checked to determine if DMA servicing is required.
The default value for XMTFW[1:0] is 00b (16 bytes).
This field is an alias of CSR80, bits 9:8.
Bit
Name
Description
XMTSP[1:0]
NOUFLO
Bytes Written
00
0
16
01
0
64
10
0
128
11
0
Full Frame
XX
1
Full Frame
XMTFW[1:0]
Bytes Available
00
16
01
64
10
128
11
256



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