AM79C970A datasheet(178/219 Pages) AMD

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AMD

P R E L I M I N A R Y

178

Am79C970A

SWITCHING CHARACTERISTICS: Bus Interface (continued)

Parameter

Symbol

Parameter Description

Test Conditions

Min

Max

Unit

EEPROM Timing

fEESK (EESK) EESK Frequency

@ 1.5 V for V (Note 2)

650

KHz

tHIGH (EESK) EESK High Time

@ 0.2 V

780

tLOW

EESK Low Time

@ 0.8 V

780

tVAL (EEDI)

EEDI Valid Output Delay from EESK

@ 1.5 V for V (Note 2)

–15

tVAL (EESK) EECS Valid Output Delay from EESK

@ 1.5 V for V (Note 2)

–15

tLOW (EECS) EECS Low Time

@ 1.5 V for V (Note 2)

1550

tSU (EEDO)

EEDO Setup Time to EESK

@ 1.5 V for V (Note 2)

tH (EEDO)

EEDO Hold Time from EESK

@ 1.5 V for V (Note 2)

Expansion ROM Interface Timing

tVAL (ERA)

ERA Valid Delay from CLK

@ 1.5 V

tVAL (EROE) EROE Valid Delay from CLK

@ 1.5 V

tVAL

ERACLK Valid Delay from CLK

@ 1.5 V

(ERACLK)

tSU (ERD)

ERD Setup Time to CLK

@ 1.5 V

tH (ERD)

ERD Hold Time to CLK

@ 1.5 V

JTAG (IEEE 1149.1) Test Signal Timing

tJ1

TCK Frequency

MHz

tJ2

TCK Period

100

tJ3

TCK High Time

@ 2.0 V

tJ4

TCK Low Time

@ 0.8 V

tJ5

TCK Rise Time

4ns

tJ6

TCK Fall Time

4ns

tJ7

TDI, TMS Setup Time

tJ8

TDI, TMS Hold Time

TDO Valid Delay

tJ9

TDO Float Delay

tJ11

All Outputs (Non-Test) Valid Delay

tJ12

All Outputs (Non-Test) Float Delay

tJ13

All Outputs (Non-Test) Setup Time

tJ4

All Outputs (Non-Test) Hold Time

Note:

1. Not tested; parameter guaranteed by characterization.

2. Parameter value is given for automatic EEPROM read operation. When EEPROM port (BCR19) is used to access the

EEPROM, software is responsible for meeting EEPROM timing requirements.

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