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AM79C970A датащи(PDF) 176 Page - Advanced Micro Devices

номер детали AM79C970A
подробное описание детали  PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
PDF  219 Pages
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производитель  AMD [Advanced Micro Devices]
домашняя страница  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C970A датащи(HTML) 176 Page - Advanced Micro Devices

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AMD
P R E L I M I N A R Y
176
Am79C970A
DC CHARACTERISTICS over COMMERCIAL operating ranges unless otherwise
specified (continued)
Parameter
Symbol
Parameter Description
Test Conditions
Min
Max
Units
Twisted Pair Interface (10BASE-T) (Continued)
VRXDTH
RXD Switching Threshold
(Note 6)
–35
35
mV
VTXH
TXD
± and TXP± Output HIGH Voltage
AVSS= 0 V
AVDD–0.6
AVDD
V
VTXL
TXD
± and TXP± Output LOW Voltage
AVDD = 5 V
AVSS
AVSS+0.6
V
VTXI
TXD
± and TXP± Differential
Output Voltage Imbalance
–40
40
mV
VTXOFF
TXD
± and TXP± Idle Output Voltage
40
mV
RTX
TXD
± , TXP± Differential Driver
(Note 6)
80
Output Impedance
Attachment Unit Interface (AUI)
IIAXD
Input Current at DI+ and DI–
–1V < VIN < AVDD + 0.5 V
–500
+500
µA
IIAXC
Input Current at CI+ and CI–
–1V < VIN < AVDD + 0.5 V
–500
+500
µA
VAOD
Differential Output Voltage
RL = 78
630
1200
mV
|(DO+)–(DO–)|
VAODOFF
Transmit Differential Output Idle Voltage
RL = 78
(Note 9)
–40
40
mV
IAODOFF
Transmit Differential Output Idle Current
RL = 78
(Note 8)
–1
1
mA
VCMT
Transmit Output Common Mode Voltage
RL = 78
2.5
AVDD
V
VODI
DO
± Transmit Differential Output
RL = 78
(Note 7)
25
mV
Voltage Imbalance
VATH
Receive Data Differential Input Threshold
–35
35
mV
VASQ
DI
± and CI± Differential Input
–275
–160
mV
Threshold (Squelch)
VIRDVD
DI
± and CI± Differential Mode Input
–1.5
1.5
V
Voltage Range
VICM
DI
± and CI± Input Bias Voltage
IIN = 0 mA
AVDD–3.0 AVDD–1.0
V
VOPD
DO
± Undershoot Voltage at ZERO
(Note 9)
–100
mV
Differential on Transmit Return
to ZERO (ETD)
Notes:
1. I
OL1 applies to AD[31:0], C/BE[3:0], PAR and REQ.
I
OL2 applies to DEVSEL, FRAME, INTA, IRDY, PERR, SERR, STOP, TRDY, EECS, ERA[7:0], ERACLK, EROE, DXCVR/
NOUT, ERD7/TXDAT, ERD6/TXEN and TDO.
I
OL3 applies to EESK/LED1/SFBD, LED2/SRDCLK, EEDO/LED3/SRD, and EEDI/LNKST.
2. V
OH does not apply to open-drain output pins.
3. Outputs are CMOS and will be driven to rail if the load is not resistive.
4. I
IX applies to all input pins except XTAL1.
5. I
OZL and IOZH apply to all three-state output pins and bi-directional pins.
6. Parameter not tested. Value determined by characterization.
7. Tested, but to values in excess of limits. Test accuracy not sufficient to allow screening guard bands.
8. Correlated to other tested parameters—not tested directly.
9. Test not implemented to data sheet specification.
10. The power supply current in Magic Packet mode is linear. For example, at CLK = 20 MHz the maximum Magic Packet mode
power supply current would be 67 mA.



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