APW8811 datasheet(17/23 Pages) ANPEC

17 / 23 page

Rev. A.3 - Sep., 2012

APW8811

www.anpec.com.tw

Application Information (Cont.)

Input Capacitor Selection

The input capacitor is chosen based on the voltage rating

and the RMS current rating. For reliable operation, select

the capacitor voltage rating to be at least 1.3 times higher

than the maximum input voltage. The maximum RMS

current rating requirement is approximately I

OUT/2, where

OUT is the load current. During power up, the input capaci-

tors have to handle large amount of surge current. In low-

duty notebook appliactions, ceramic capacitors are

remmended. The capacitors must be connected between

the drain of high-side MOSFET and the source of low-

side MOSFET with very low-impeadance PCB layout.

MOSFET Selection

The application for a notebook battery with a maximum volt-

age of 24V, at least a minimum 30V MOSFETs should

be used. The design has to trade off the gate charge with

the R

DS(ON) of the MOSFET:

• For the low-side MOSFET, before it is turned on, the

body diode has been conducted. The low-side MOSFET

driver will not charge the miller capacitor of this

MOSFET.

• In the turning off process of the low-side MOSFET,

the load current will shift to the body diode first. The

high dv/dt of the phase node voltage will charge the

miller capacitor through the low-side MOSFET driver

sinking current path. This results in much less

switching loss of the low-side MOSFETs. The duty

cycle is often very small in high battery voltage

applications, and the low-side MOSFET will con-

duct most of the switching cycle; therefore, the less

the R

DS(ON)

of the low-side MOSFET, the less the power

loss. The gate charge for this MOSFET is usually a

secondary consideration. The high-side MOSFET

d o e s n o t h a v e t h i s z e r o v o l t a g e s w i t c h i n g

condition, and because it conducts for less time

compared to the low-side MOSFET, the switching

loss tends to be dominant. Priority should be given

to the MOSFETs with less gate charge, so that both

the gate driver loss and switching loss will be

minimized.

high-side = IOUT

(1+ TC)(R

DS(ON))D + (0.5)( IOUT)(VIN)( tSW)FSW

low-side = IOUT

(1+ TC)(R

DS(ON))(1-D)

Where

OUT

is the load current

TC is the temperature dependency of R

DS(ON)

SW is the switching frequency

SW is the switching interval

D is the duty cycle

Note that both MOSFETs have conduction losses while

the high-side MOSFET includes an additional transi-

tion loss. The switching internal, t

SW , is the function

of the reverse transfer capacitance C

RSS. The (1+TC) term

is to factor in the temperature dependency of the R

DS(ON)

and can be extracted from the “R

DS(ON) vs Temperature”

curve of the power MOSFET.

Layout Consideration

In any high switching frequency converter, a correct layout

is important to ensure proper operation of the regulator.

With power devices switching at higher frequency, the

resulting current transient will cause voltage spike across

the interconnecting impedance and parasitic circuit

elements. As an example, consider the turn-off transition

of the PW M MOSFET. Before turn-off condition, the

MOSFET is carrying the full load current. During turn-off,

current stops flowing in the MOSFET and is freewheeling

by the lower MOSFET and parasitic diode. Any parasitic

inductance of the circuit generates a large voltage spike

during the switching interval. In general, using short and

wide printed circuit traces should minimize interconnect-

ing impedances and the magnitude of voltage spike. And

signal and power grounds are to be kept separating and

finally combined to use the ground plane construction or

single point grounding. The best tie-point between the

signal ground and the power ground is at the negative

side of the output capacitor on each channel, where there

is less noise. Noisy traces beneath the IC are not

recommended. Below is a checklist for your layout:

The selection of the N-channel power MOSFETs are de-

termined by the R

DS(ON), reversing transfer capacitance

RSS) and maximum output current requirement. The

losses in the MOSFETs have two components: conduc-

tion loss and transition loss. For the high-side and low-

side MOSFETs, the losses are approximately given by

the following equations:

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