APW8811 datasheet(12/23 Pages) ANPEC

12 / 23 page

Rev. A.3 - Sep., 2012

APW8811

www.anpec.com.tw

Reference Voltages and Linear Regulator

(REF and LDO3/5)

The 2V reference, REF, is accurate to ±1% over-

temperature. Bypass to GND with a 0.1

µF (minimum)

capacitor. REF can source up to 50

µA for external loads.

However, avoid loading REF if extremely accurate speci-

fications for both the main output voltages and REF are

essential. In addition, REF voltage must be bigger than

its rising enable threshold, and then the LDO output starts

to rise up.

The LDO3 and LDO5 regulators can supply up to 100mA

for external loads. Bypass to GND with a minimum of

2.2

µF ceramic capacitor for stability. When ENLDO is

enabled, the V

LDO3 is fixed 3.33V and the VLDO5 is fixed 5V in

standby mode. When PWMx output voltage is over whose

bypass threshold(PWM1 is 4.7V and PWM2 is 3.15V), the

switchover between the internal LDOx and VOUTx is

workable. These actions change the current path to power

the loads from the PWMx regulateon voltage, rather than

from the internal linear regulator.

Function Description (Cont.)

Ultrasonic Mode (Cont.)

A Power-On-Reset (POR) function is designed to prevent

wrong logic controls. The POR function continually moni-

tors the supply voltage on the LDO5 pins. LDO5 POR

circuitry inhibits wrong switching. When the rising V

LDO5

voltage reaches the rising POR threshold (4.2V typ.), the

output voltages begin to ramp up. When the LDO5 volt-

age is lower than 4.1V(typ.) or LDO3 voltage is lower than

2.5V(typ.), both switch power supplies are shut off. This

is non-latch protection. LDO5 POR threshold could reset

the under-voltage, over-voltage.

Power-On-Reset

The APW8811 integrates digital soft-start circuit to ramp

up the PWMx output voltage of the converter to the pro-

grammed regulation set point at a predictable slew rate.

The slew rate of PWMx output voltage is internally con-

trolled to limit the inrush current through the output ca-

pacitors during soft-start process. When the ENPWM pin

is pulled above the rising threshold voltage, the both of

PWM1 and PWM2 initiate a soft-start process to ramp up

the output voltage at the same time. The soft-start interval

is 1.7ms(typ.) and independent of the UGATE switching

frequency.

Digital Soft-Start

The APW8811 has two independent enable controls for

PWM and LDO. When the ENLDO pin is high (EN=1), the

REF, LDO3 and LDO5 are enabled to standby mode. It

means that the PWM1 and PWM2 are ready to enable at

this mode. When the ENPWM pin is high (EN=1) at standby

mode, the both of PWM1 and PWM2 initiate a soft-start

process to ramp up the output voltage at the same time.

When both ENLDO and ENPWM are low, the chip is in its

low-power shutdown state. The APW8811 only consumes

µA of quiescent current while in shutdown.

Both PWM outputs are discharged to 0V through a 25

Ω

switch and both LDO outputs is discharged to 0V through

a 40

Ω switch in shutdown mode. Driving ENPWM or

ENLDO below 0.4V clears the over-voltage, under-volt-

age and over-temperature fault latches.

Enable Controls

In the event of PWM under-voltage or shutdown, the chip

enables the soft-stop function. The soft-stop function dis-

charges the PWM output voltages to GND through an

internal 25

Ω switch. The reference remains active to pro-

vide an accurate threshold and to provide over-voltage

protection.

Soft-Stop (PWMs)

controller turns off the low-side MOSFET and triggers a

constant-on-time. When the constant-on-time has

expired, the controller turns on the low-side MOSFET

again until the inductor current is below the zero-cross-

ing threshold. The behavior is the same with PFM mode.

APW8811 датащи(PDF) 12 Page - Anpec Electronics Coropration

APW8811 датащи(HTML) 12 Page - Anpec Electronics Coropration

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

датащи скачать

ссылки URL