AT90USB646 datasheet(83/456 Pages) ATMEL

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7593L–AVR–09/12

AT90USB64/128

11.3.5

Alternate Functions of Port D

The Port D pins with alternate functions are shown in Table 11-12.

The alternate pin configuration is as follows:

• T0 – Port D, bit 7

T0, Timer/Counter0 counter source.

• T1 – Port D, bit 6

T1, Timer/Counter1 counter source.

• XCK1 – Port D, bit 5

XCK1, USART1 External clock. The Data Direction Register (DDD5) controls whether the clock

is output (DDD5 set) or input (DDD5 cleared). The XCK1 pin is active only when the USART1

operates in Synchronous mode.

Table 11-11. Overriding signals for alternate functions in PC3..PC0.

Signal

name

PC3/A11/T.3

PC2/A10

PC1/A9

PC0/A8

PUOE

SRE • (XMM<5)

SRE • (XMM<6)

SRE • (XMM<7)

PUOV

DDOE

SRE • (XMM<5)

SRE • (XMM<6)

SRE • (XMM<7)

DDOV

PVOE

SRE • (XMM<5)

SRE • (XMM<6)

SRE • (XMM<7)

PVOV

A11

A10

DIEOE

DIEOV

T3 input

–

AIO

–

Table 11-12. Port D pins alternate functions.

Port pin

Alternate function

PD7

T0 (Timer/Counter0 Clock Input)

PD6

T1 (Timer/Counter1 Clock Input)

PD5

XCK1 (USART1 External Clock Input/Output)

PD4

ICP1 (Timer/Counter1 Input Capture Trigger)

PD3

INT3/TXD1 (External Interrupt3 Input or USART1 Transmit Pin)

PD2

INT2/RXD1 (External Interrupt2 Input or USART1 Receive Pin)

PD1

INT1/SDA/OC2B (External Interrupt1 Input or TWI Serial DAta or Output Compare for

Timer/Counter2)

PD0

INT0/SCL/OC0B (External Interrupt0 Input or TWI Serial CLock or Output Compare for

Timer/Counter0)

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