DSPIC33FJ12GP201TESLASHML datasheet(47/242 Pages) MICROCHIP

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Preliminary

DS70264B-page 45

dsPIC33FJ12GP201/202

3.6.2

DATA ACCESS FROM PROGRAM

MEMORY USING TABLE

INSTRUCTIONS

The TBLRDL and TBLWTL instructions offer a direct

method of reading or writing the lower word of any

address within the program space without going

through data space. The TBLRDH and TBLWTH

instructions are the only method to read or write the

upper 8 bits of a program space word as data.

The PC is incremented by two for each successive

24-bit program word. This allows program memory

addresses to directly map to data space addresses.

Program memory can thus be regarded as two

16-bit-wide word address spaces, residing side by side,

each with the same address range. TBLRDL and

TBLWTL access the space that contains the least

significant data word. TBLRDH and TBLWTH access the

space that contains the upper data byte.

Two table instructions are provided to move byte or

word-sized (16-bit) data to and from program space.

Both function as either byte or word operations.

• TBLRDL (Table Read Low): In Word mode, this

instruction maps the lower word of the program

space location (P<15:0>) to a data address

(D<15:0>).

In Byte mode, either the upper or lower byte of the

lower program word is mapped to the lower byte of

a data address. The upper byte is selected when

Byte Select is ‘1’; the lower byte is selected when

it is ‘0’.

• TBLRDH (Table Read High): In Word mode, this

instruction maps the entire upper word of a program

address (P<23:16>) to a data address. Note that

D<15:8>, the ‘phantom byte’, will always be ‘0’.

In Byte mode, this instruction maps the upper or

lower byte of the program word to D<7:0> of the

data address, as in the TBLRDL instruction. Note

that the data will always be ‘0’ when the upper

‘phantom’ byte is selected (Byte Select = 1).

In a similar fashion, two table instructions, TBLWTH

and TBLWTL, are used to write individual bytes or

words to a program space address. The details of

their operation are explained in Section 4.0 “Flash

Program Memory”.

For all table operations, the area of program memory

space to be accessed is determined by the Table Page

memory space of the device, including user and config-

uration spaces. When TBLPAG<7> = 0, the table page

is located in the user memory space. When

TBLPAG<7> = 1, the page is located in configuration

space.

FIGURE 3-8:

ACCESSING PROGRAM MEMORY WITH TABLE INSTRUCTIONS

00000000

‘Phantom’ Byte

TBLRDH.B (Wn<0> = 0)

TBLRDL.W

TBLRDL.B (Wn<0> = 1)

TBLRDL.B (Wn<0> = 0)

TBLPAG

0x000000

0x800000

0x020000

0x030000

Program Space

The address for the table operation is determined by the data EA

within the page defined by the TBLPAG register.

Only read operations are shown; write operations are also valid in

the user memory area.

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