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AM3703CUS датащи(PDF) 169 Page - Texas Instruments |
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AM3703CUS датащи(HTML) 169 Page - Texas Instruments |
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169 / 280 page ![]() AM3715, AM3703 www.ti.com SPRS616F – JUNE 2010 – REVISED AUGUST 2011 6.4.1.2 GPMC/NOR Flash —Asynchronous Mode Table 6-6 and Table 6-7 assume testing over the recommended operating conditions and electrical characteristic conditions below (see Figure 6-7 through Figure 6-12). Table 6-5. GPMC/NOR Flash Timing Conditions —Asynchronous Mode TIMING CONDITION PARAMETER VALUE UNIT Input Conditions tR Input signal rise time 1.8 ns tF Input signal fall time 1.8 ns Output Conditions CLOAD Output load capacitance(1) 16 pF (1) The load setting of the IO buffer: LB0 = 0. Table 6-6. GPMC/NOR Flash Internal Timing Parameters —Asynchronous Mode(1) (2) (4) NO. PARAMETER OPP100 OPP50 UNIT MIN MAX MIN MAX FI1 Delay time, output data gpmc_d[15:0] generation from internal 6.6 7.0 ns functional clock GPMC_FCLK(3) FI2 Delay time, input data gpmc_d[15:0] capture from internal functional 4.4 7.0 ns clock GPMC_FCLK(3) FI3 Delay time, output chip select gpmc_ncsx generation from internal 6.5 7.0 ns functional clock GPMC_FCLK(3) FI4 Delay time, output address gpmc_a[27:1] generation from internal 7.6 7.0 ns functional clock GPMC_FCLK(3) FI5 Delay time, output address gpmc_a[27:1] valid from internal functional 7.6 7.0 ns clock GPMC_FCLK(3) FI6 Delay time, output lower-byte enable/command latch enable 6.5 7.0 ns gpmc_nbe0_cle, output upper-byte enable gpmc_nbe1 generation from internal functional clock GPMC_FCLK(3) FI7 Delay time, output enable gpmc_noe generation from internal 5.8 7.0 ns functional clock GPMC_FCLK(3) FI8 Delay time, output write enable gpmc_nwe generation from internal 7.0 7.0 ns functional clock GPMC_FCLK(3) FI9 Skew, internal functional clock GPMC_FCLK(3) 100 170 ps FI10 Delay time, IO direction generation from internal functional clock 6.3 7.0 ps GPMC_FCLK(3) (1) The internal parameters table must be used to calculate data access time stored in the corresponding CS register bit field. (2) Internal parameters are referred to the GPMC functional internal clock which is not provided externally. (3) GPMC_FCLK is general-purpose memory controller internal functional clock. (4) See Section 4.3.4, Processor Clocks. Copyright © 2010–2011, Texas Instruments Incorporated Timing Requirements and Switching Characteristics 169 Submit Documentation Feedback Product Folder Link(s): AM3715 AM3703 |
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