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LPC810M021FN8 датащи(PDF) 8 Page - NXP Semiconductors |
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LPC810M021FN8 датащи(HTML) 8 Page - NXP Semiconductors |
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8 / 71 page ![]() LPC81xM All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 3 — 29 July 2013 8 of 71 NXP Semiconductors LPC81xM 32-bit ARM Cortex-M0+ microcontroller 7.2 Pin description The pin description table Table 4 shows the pin functions that are fixed to specific pins on each package. These fixed-pin functions are selectable between GPIO and the comparator, SWD, RESET, and the XTAL pins. By default, the GPIO function is selected except on pins PIO0_2, PIO0_3, and PIO0_5. JTAG functions are available in boundary scan mode only. Movable function for the I2C, USART, SPI, and SCT pin functions can be assigned through the switch matrix to any pin that is not power or ground in place of the pin’s fixed functions. The following exceptions apply: For full I2C-bus compatibility, assign the I2C functions to the open-drain pins PIO0_11 and PIO0_10. Do not assign more than one output to any pin. However, more than one input can be assigned to a pin. Once any function is assigned to a pin, the pin’s GPIO functionality is disabled. Pin PIO0_4 triggers a wake-up from Deep power-down mode. If you need to wake up from Deep power-down mode via an external pin, do not assign any movable function to this pin. The JTAG functions TDO, TDI, TCK, TMS, and TRST are selected on pins PIO0_0 to PIO0_4 by hardware when the part is in boundary scan mode. Table 4. Pin description table (fixed pins) Symbol Type Reset state [1] Description PIO0_0/ACMP_I1/ TDO 19 16 8 [5] I/O I; PU PIO0_0 — General purpose digital input/output port 0 pin 0. In ISP mode, this is the USART0 receive pin U0_RXD. In boundary scan mode: TDO (Test Data Out). AI - ACMP_I1 — Analog comparator input 1. PIO0_1/ACMP_I2/ CLKIN/TDI 12 9 5 [5] I/O I; PU PIO0_1 — General purpose digital input/output pin. In boundary scan mode: TDI (Test Data In). ISP entry pin on chip versions 1A and 2A and on the DIP8 package (see Table 6). For these chip versions and packages, a LOW level on this pin during reset starts the ISP command handler. See PIO0_12 for all other packages. AI - ACMP_I2 — Analog comparator input 2. I- CLKIN — External clock input. SWDIO/PIO0_2/TMS 7 6 4 [2] I/O I; PU SWDIO — Serial Wire Debug I/O. SWDIO is enabled by default on this pin. In boundary scan mode: TMS (Test Mode Select). I/O - PIO0_2 — General purpose digital input/output pin. |
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