LPC810M021FN8 datasheet(21/71 Pages) NXP

21 / 71 page

LPC81xM

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Product data sheet

Rev. 3 — 29 July 2013

21 of 71

NXP Semiconductors

LPC81xM

32-bit ARM Cortex-M0+ microcontroller

8.17.1 Features

• Internally resets chip if not periodically reloaded during the programmable time-out

period.

• Optional windowed operation requires reload to occur between a minimum and

maximum time period, both programmable.

• Optional warning interrupt can be generated at a programmable time prior to

watchdog time-out.

• Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be

disabled.

• Incorrect feed sequence causes reset or interrupt if enabled.

• Flag to indicate watchdog reset.

• Programmable 24-bit timer with internal prescaler.

• Selectable time period from (Tcy(WDCLK)  256  4) to (Tcy(WDCLK)  224  4) in

multiples of Tcy(WDCLK)  4.

• The Watchdog Clock (WDCLK) source can be selected from the internal RC oscillator

(IRC), or the dedicated watchdog oscillator (WDOsc). This gives a wide range of

potential timing choices of watchdog operation under different power conditions.

8.18 Self Wake-up Timer (WKT)

The self wake-up timer is a 32-bit, loadable down-counter. Writing any non-zero value to

this timer automatically enables the counter and launches a count-down sequence. When

the counter is used as a wake-up timer, this write can occur just prior to entering a

reduced power mode.

8.18.1 Features

• 32-bit loadable down-counter. Counter starts automatically when a count value is

loaded. Time-out generates an interrupt/wake up request.

• The WKT resides in a separate, always-on power domain.

• The WKT supports two clock sources: the low-power oscillator and the IRC. The

low-power oscillator is located in the always-on power domain, so it can be used as

the clock source in Deep power-down mode.

• The WKT can be used for waking up the part from any reduced power mode,

including Deep power-down mode, or for general-purpose timing.

8.19 SysTick timer

The ARM Cortex-M0+ 24-bit SysTick timer is implemented on the LPC81xM.

8.20 Analog comparator (ACMP)

The analog comparator with selectable hysteresis can compare voltage levels on external

pins and internal voltages.

After power-up and after switching the input channels of the comparator, the output of the

voltage ladder must be allowed to settle to its stable value before it can be used as a

comparator reference input. Settling times are given in Table 22.

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