MRF49XA-ISLASHT datasheet(58/102 Pages) MICROCHIP

58 / 102 page

MRF49XA

DS70590C-page 58

Preliminary

3.11

Data Quality Indicator

The DQI is the digital processing part of the radio

connected to the demodulator and functions when the

receiver is on. This reports the reception of an FSK

modulated RF signal. The DQI parameter setting

defines how clean the incoming data stream would be

stated as good data (valid FSK signal). The DIO signal

goes high if the internally calculated data quality value

exceeds the DIO threshold parameter, for five

consecutive data bits, for both high and low periods.

The DQI parameter (i.e., Data Quality Threshold

Indicator (DQTI) bit) value is calculated using the

formula given in Equation 3-1.

EQUATION 3-1:

The DQI parameter in BBFCREG should be chosen

according to the following rules:

• The parameter should be > 4; otherwise, noise

might be treated as a valid FSK signal

• The maximum value is 7

Even during the on-time calculation in the Low Duty

Cycle mode, depending on the data quality threshold

indicator, the device needs to receive a few valid data

bits before the DQI signal indicates good signal

condition (see Register 2-8). Selecting a short on-time

can prevent the crystal oscillator from starting, or the

DQI signal will not go high, even when the quality of the

received signal is good.

The DIO is an extension of the DQI. When incoming

data is detected, it uses the DQI signal, the clock

recovery lock signal and the digital RSSI signal to

determine if the incoming data is valid. The desired

data rate and the acceptance criteria for valid data are

user-programmable through the SPI port.

The DIO has three modes of operation: Slow, Medium

and Fast. Each mode is dependent on the signals it

uses to determine the valid data and also on the

number of incoming preamble bits present at the

beginning of the packet.

The DIO can be disabled by the user so that only raw

data from the comparator comes out, or it can be set to

accept only a preset range of data rates and data

quality. The DIO saves the battery power and the time

for a host microcontroller because it will not wake-up

the microcontroller unless there is valid data present.

See Register 2-7 (RXCREG) for setup details.

The DIO signal is valid when using the internal receive

FIFO or an external pin to capture baseband data. DIO

can be multiplexed to pin 16 for external usage.

Figure 3-10 depicts the DIO logic block diagram.

FIGURE 3-10:

DIO LOGIC BLOCK DIAGRAM

DQIpar = 4 x (Deviation – TX/RXoffset)/Bit Rate

R/S

FLIP/FLOP

CR_LOCK

DRSSI

DQI

DRSSI

DQI

CR_LOCK

SET

RXCEN

LOGIC HIGH

SLOW

MEDIUM

FAST

DIORT1

DIORT0

DQI

MUX

SEL0

SEL1

IN0

IN1

IN2

IN3

DIO

CLR

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