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MMPF0100NPEP датащи(PDF) 136 Page - Freescale Semiconductor, Inc |
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MMPF0100NPEP датащи(HTML) 136 Page - Freescale Semiconductor, Inc |
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136 / 137 page ![]() Analog Integrated Circuit Device Data 136 Freescale Semiconductor PF0100 Revision History Document Changes 10 Revision History 10.1 Document Changes REVISION DATE DESCRIPTION OF CHANGES 1.0 7/2011 • Preliminary specification release 2.0 8/2012 • NPI phase: prototype major updates throughout cycle 3.0 10/2012 • Initial production release 4.0 5/2013 • Table 2. Added recommended pin connection when regulators are unused • Update Table 7. Current Consumption summary • Table 8. Removed VREFDDR_VOLT row • Removed automatic fuse programming feature • Updated Max frequency specification for the 16 MHz clock to 17.2 MHz • Table 15. Added specification for derived 2.0 Mhz clock • Added Clock adjustment • Table 20. Updated VREFDDR minimum Current limit specification • Updated Block diagram for all Switching Regulators • Updated current limit and overcurrent protection minimum specification on LDOS • Table 109. Update VTH0 and VTL0 specification on VSNVS • Updated Table 135, Address FF • Updated Table 136, address D8 and D9 • Update Figure 29. Typical application diagram • Removed Part Identification section |
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