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MMPF0100NPEP датащи(PDF) 37 Page - Freescale Semiconductor, Inc |
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MMPF0100NPEP датащи(HTML) 37 Page - Freescale Semiconductor, Inc |
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37 / 137 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 37 PF0100 Functional Block Requirements and Behaviors Power Generation The regulators have a strong sourcing capability and sinking capability in PWM mode, therefore the fastest rising and falling slopes are determined by the regulator in PWM mode. However, if the regulators are programmed in PFM or APS mode during a DVS transition, the falling slope can be influenced by the load. Additionally, as the current capability in PFM mode is reduced, controlled DVS transitions in PFM mode could be affected. Critically timed DVS transitions are best assured with PWM mode operation. The following diagram shows the general behavior for the regulators when initiated with I2C programming, or standby control. During the DVS period the overcurrent condition on the regulator should be masked. Figure 10. Voltage Stepping with DVS Regulator Phase Clock The SWxPHASE[1:0] bits select the phase of the regulator clock as shown in Table 34. By default, each regulator is initialized at 90 ° out of phase with respect to each other. For example, SW1x is set to 0 °, SW2 is set to 90 °, SW3A/B is set to 180 °, and SW4 is set to 270 ° by default at power up. Table 32. DVS Speed Selection for SW1A/B/C SW1xDVSSPEED[1:0] Function 00 25 mV step each 2.0 s 01 (default) 25 mV step each 4.0 s 10 25 mV step each 8.0 s 11 25 mV step each 16 s Table 33. DVS Speed Selection for SW2, SW3A/B, and SW4 SWxDVSSPEED[1:0] Function SWx[6] = 0 or SWxSTBY[6] = 0 Function SWx[6] = 1 or SWxSTBY[6] = 1 00 25 mV step each 2.0 s 50 mV step each 4.0 s 01 (default) 25 mV step each 4.0 s 50 mV step each 8.0 s 10 25 mV step each 8.0 s 50 mV step each 16 s 11 25 mV step each 16 s 50 mV step each 32 s Actual Output Voltage Example Actual Output Voltage Possible Output Voltage Window Internally Controlled Steps Output Voltage with light Load Initial Set Point Voltage Change Request Internally Controlled Steps Output Voltage Requested Set Point Initiated by I2C Programming, Standby Control Request for Higher Voltage Request for Lower Voltage |
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