MMPF0100NPEP datasheet(47/137 Pages) FREESCALE

47 / 137 page

Analog Integrated Circuit Device Data



Freescale Semiconductor

PF0100

Functional Block Requirements and Behaviors

Power Generation

SW1A/B/C External Components

Table 49. Register SW1CMODE - ADDR 0x31

Name

Bit #

R/W

Default

Description

SW1CMODE

3:0

R/W

0x80

Sets the SW1C switching operation mode.

See Table 28 for all possible configurations.

UNUSED

–

0x00

UNUSED

SW1COMODE

R/W

0x00

Set status of SW1C when in Sleep mode

0 = OFF

1 = PFM

UNUSED

7:6

–

0x00

UNUSED

Table 50. Register SW1CCONF - ADDR 0x32

Name

Bit #

R/W

Default

Description

SW1CILIM

R/W

0x00

SW1C current limit level selection

0 = High level current limit

1 = Low level current limit

UNUSED

R/W

0x00

Unused

SW1CFREQ

3:2

R/W

0x00

SW1C switching frequency selector.

See Table 36.

SW1CPHASE

5:4

R/W

0x00

SW1C Phase clock selection.

See Table 34.

SW1CDVSSPEED

7:6

R/W

0x00

SW1C DVS speed selection.

See Table 32.

Table 51. SW1A/B/C External Component Recommendations

Mode

Components

Description

A/B/C Single

Phase

A/B Single - C

Independent Mode

A/B Dual - C

Independent Mode

CINSW1A(38)

SW1A Input capacitor

4.7

F4.7 F4.7 F

CIN1AHF(38)

SW1A Decoupling input capacitor

0.1

F0.1 F0.1 F

CINSW1B(38)

SW1B Input capacitor

4.7

F4.7 F4.7 F

CIN1BHF(38)

SW1B Decoupling input capacitor

0.1

F0.1 F0.1 F

CINSW1C(38)

SW1C Input capacitor

4.7

F4.7 F4.7 F

CIN1CHF(38)

SW1C Decoupling input capacitor

0.1

F0.1 F0.1 F

COSW1AB(38)

SW1A/B Output capacitor

6 x 22

F4 x 22 F

4 x 22

F

COSW1C(38)

SW1C Output capacitor

–

2 x 22

F

2 x 22

F

LSW1A

SW1A Inductor

1.0

H

DCR = 12 m



ISAT = 4.5 A

1.0

H

DCR = 12 m



ISAT = 4.5 A

1.0

H

DCR = 60 m



ISAT = 2.4 A

LSW1B

SW1B Inductor

–

1.0

H

DCR = 60 m



ISAT = 2.4 A

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