MMPF0100NPEP datasheet(24/137 Pages) FREESCALE

24 / 137 page

Analog Integrated Circuit Device Data



Freescale Semiconductor

PF0100

Functional Block Requirements and Behaviors

16 MHz and 32 kHz Clocks

6.2

16 MHz and 32 kHz Clocks

There are two clocks: a trimmed 16 MHz, RC oscillator and an untrimmed 32 kHz, RC oscillator. The 16 MHz oscillator is

specified within -8.0/+8.0%. The 32 kHz untrimmed clock is only used in the following conditions:

• VIN < UVDET

• All regulators are in SLEEP mode

• All regulators are in PFM switching mode

A 32 kHz clock, derived from the 16 MHz trimmed clock, is used when accurate timing is needed under the following conditions:

• During start-up, VIN > UVDET

• PWRON_CFG = 1, for power button debounce timing

In addition, when the 16 MHz is active in the ON mode, the debounce times in Table 25 are referenced to the 32 kHz derived

from the 16 MHz clock. The exceptions are the LOWVINI and PWRONI interrupts, which are referenced to the 32 kHz untrimmed

clock.

6.2.1

Clock adjustment

The 16 MHz clock and hence the switching frequency of the regulators, can be adjusted to improve the noise integrity of the

system. By changing the factory trim values of the 16MHz clock, the user may add an offset as small as

3.0% of the nominal

frequency. Contact your Freescale representative for detailed information on this feature.

6.3

Bias and References Block Description

6.3.1

Internal Core Voltage References

All regulators use the main bandgap as the reference. The main bandgap is bypassed with a capacitor at VCOREREF. The

bandgap and the rest of the core circuitry are supplied from VCORE. The performance of the regulators is directly dependent on

the performance of the bandgap. No external DC loading is allowed on VCORE, VCOREDIG, or VCOREREF. VCOREDIG is

kept powered as long as there is a valid supply and/or valid coin cell. Table 16 shows the main characteristics of the core circuitry.

Table 14. Source of Start-up Sequence

VDDOTP(V)

TBB_POR

FUSE_POR

Start-up Sequence

None

OTP fuses

TBBOTP registers

1.5

Factory defined

Table 15. 16 MHz Clock Specifications

TA = -40 to 85°C, VIN = 2.8 to 4.5 V, LICELL = 1.8 to 3.3 V and typical external component values. Typical values are

characterized at VIN = 3.6 V, LICELL = 3.0 V, and 25 °C, unless otherwise noted.

Parameters

Symbol

Min

Typ

Max

Units

Operating Voltage From VIN

VIN16MHz

2.8

–

4.5

16 MHz Clock Frequency

f16MHZ

14.7

17.2

MHz

2.0 MHz Clock Frequency (25)

f2MHZ

1.84

–

2.15

MHz

Notes

25.

2.0 MHz clock is derived from the 16 MHz clock.

MMPF0100NPEP датащи(PDF) 24 Page - Freescale Semiconductor, Inc

MMPF0100NPEP датащи(HTML) 24 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL