MMPF0100NPEP datasheet(127/137 Pages) FREESCALE

127 / 137 page

Analog Integrated Circuit Device Data



Freescale Semiconductor

127

PF0100

Typical Applications

PF0100 Layout Guidelines

7.2

PF0100 Layout Guidelines

7.2.1

General Board Recommendations

1. It is recommended to use an eight layer board stack-up arranged as follows:

• High current signal

•GND

•Signal

• Power

•Signal

•GND

• High current signal

2. Allocate TOP and BOTTOM PCB Layers for POWER ROUTING (high current signals), copper-pour the unused area.

3. Use internal layers sandwiched between two GND planes for the SIGNAL routing.

7.2.2

Component Placement

It is desirable to keep all component related to the power stage as close to the PMIC as possible, specially decoupling input and

output capacitors.

7.2.3

General Routing Requirements

1. Some recommended things to keep in mind for manufacturability:

•

Via in pads require a 4.5 mil minimum annular ring. Pad must be 9.0 mils larger than the hole

•

Maximum copper thickness for lines less than 5.0 mils wide is 0.6 oz copper

•

Minimum allowed spacing between line and hole pad is 3.5 mils

•

Minimum allowed spacing between line and line is 3.0 mils

2. Care must be taken with SWxFB pins traces. These signals are susceptible to noise and must be routed far away from

power, clock, or high power signals, like the ones on the SWxIN, SWx, SWxLX, SWBSTIN, SWBST, and SWBSTLX pins.

They could be also shielded.

3. Shield feedback traces of the regulators and keep them as short as possible (trace them on the bottom so the ground and

power planes shield these traces).

4. Avoid coupling traces between important signal/low noise supplies (like REFCORE, VCORE, VCOREDIG) from any

switching node (i.e. SW1ALX, SW1BLX, SW1CLX, SW2LX, SW3ALX, SW3BLX, SW4LX, and SWBSTLX).

5. Make sure that all components related to a specific block are referenced to the corresponding ground.

7.2.4

Parallel Routing Requirements

1. I2C signal routing

•

CLK is the fastest signal of the system, so it must be given special care.

•

To avoid contamination of these delicate signals by nearby high power or high frequency signals, it is a good

practice to shield them with ground planes placed on adjacent layers. Make sure the ground plane is uniform

throughout the whole signal trace length.

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