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DP83848JSQ датащи(PDF) 52 Page - Texas Instruments |
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DP83848JSQ датащи(HTML) 52 Page - Texas Instruments |
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52 / 80 page ![]() 51 www.national.com 7.2.4 100 Mb/s PCS Configuration and Status Register (PCSR) Table 24. 100 Mb/s PCS Configuration and Status Register (PCSR), address 0x16 Bit Bit Name Default Description 15:13 RESERVED <00>, RO RESERVED: Writes ignored, Read as 0. 12 RESERVED 0 RESERVED: Must be zero. 11 RESERVED 0 RESERVED: Must be zero. 10 TQ_EN 0, RW 100Mbs True Quiet Mode Enable: 1 = Transmit True Quiet Mode. 0 = Normal Transmit Mode. 9 SD FORCE PMA 0,RW Signal Detect Force PMA: 1 = Forces Signal Detection in PMA. 0 = Normal SD operation. 8 SD_OPTION 1, RW Signal Detect Option: 1 = Enhanced signal detect algorithm. 0 = Reduced signal detect algorithm. 7 DESC_TIME 0, RW Descrambler Timeout: Increase the descrambler timeout. When set this should allow the device to receive larger packets (>9k bytes) without loss of syn- chronization. 1 = 2ms 0 = 722us (per ANSI X3.263: 1995 (TP-PMD) 7.2.3.3e) 6 RESERVED 0 RESERVED: Must be zero. 5 FORCE_100_OK 0, RW Force 100Mb/s Good Link: 1 = Forces 100Mb/s Good Link. 0 = Normal 100Mb/s operation. 4 RESERVED 0 RESERVED: Must be zero. 3 RESERVED 0 RESERVED: Must be zero. 2 NRZI_BYPASS 0, RW NRZI Bypass Enable: 1 = NRZI Bypass Enabled. 0 = NRZI Bypass Disabled. 1 RESERVED 0 RESERVED: Must be zero. 0 RESERVED 0 RESERVED: Must be zero. |
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