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dsPIC33FJ64GS406 датащи(PDF) 20 Page - Microchip Technology |
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dsPIC33FJ64GS406 датащи(HTML) 20 Page - Microchip Technology |
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20 / 456 page ![]() dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610 DS70591E-page 20 2009-2012 Microchip Technology Inc. U1CTS U1RTS U1RX U1TX U2CTS U2RTS U2RX U2TX I O I O I O I O ST — ST — ST — ST — UART1 Clear-to-Send. UART1 Ready-to-Send. UART1 receive. UART1 transmit. UART2 Clear-to-Send. UART2 Ready-to-Send. UART2 receive. UART2 transmit. SCK1 SDI1 SDO1 SS1, ASS1 SCK2 SDI2 SDO2 SS2 I/O I O I/O I/O I O I/O ST ST — ST ST ST — ST Synchronous serial clock input/output for SPI1. SPI1 data in. SPI1 data out. SPI1 slave synchronization or frame pulse I/O. Synchronous serial clock input/output for SPI2. SPI2 data in. SPI2 data out. SPI2 slave synchronization or frame pulse I/O. SCL1 SDA1 SCL2 SDA2 I/O I/O I/O I/O ST ST ST ST Synchronous serial clock input/output for I2C1. Synchronous serial data input/output for I2C1. Synchronous serial clock input/output for I2C2. Synchronous serial data input/output for I2C2. TMS TCK TDI TDO I I I O TTL TTL TTL — JTAG Test mode select pin. JTAG test clock input pin. JTAG test data input pin. JTAG test data output pin. CMP1A CMP1B CMP1C CMP1D CMP2A CMP2B CMP2C CMP2D CMP3A CMP3B CMP3C CMP3D CMP4A CMP4B CMP4C CMP4D I I I I I I I I I I I I I I I I Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Comparator 1 Channel A. Comparator 1 Channel B. Comparator 1 Channel C. Comparator 1 Channel D. Comparator 2 Channel A Comparator 2 Channel B. Comparator 2 Channel C. Comparator 2 Channel D. Comparator 3 Channel A. Comparator 3 Channel B. Comparator 3 Channel C. Comparator 3 Channel D. Comparator 4 Channel A. Comparator 4 Channel B. Comparator 4 Channel C. Comparator 4 Channel D. DACOUT O — DAC output voltage. EXTREF I Analog External voltage reference input for the reference DACs. REFCLK O — REFCLK output signal is a postscaled derivative of the system clock. TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Name Pin Type Buffer Type Description Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input ST = Schmitt Trigger input with CMOS levels P = Power O = Output TTL = Transistor-Transistor Logic |
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