AD5322ARMZ datasheet(18/24 Pages) AD

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AD5302/AD5312/AD5322

Rev. D | Page 18 of 24

APPLICATIONS INFORMATION

TYPICAL APPLICATION CIRCUIT

The AD5302/AD5312/AD5322 can be used with a wide range

of reference voltages, especially if the reference inputs are

configured to be unbuffered, in which case the devices offer full,

one-quadrant multiplying capability over a reference range of

0 V to VDD. More typically, the AD5302/AD5312/AD5322 can

be used with a fixed, precision reference voltage. Figure 38

shows a typical setup for the AD5302/AD5312/AD5322

when using an external reference. If the reference inputs are

unbuffered, the reference input range is from 0 V to VDD, but if

the on-chip reference buffers are used, the reference range is

reduced. Suitable references for 5 V operation are the AD780

and REF192 (2.5 V references). For 2.5 V operation, a suitable

external reference would be the REF191, a 2.048 V reference.

SCLK

DIN

GND

AD5302/AD5312/

AD5322

SERIAL

INTERFACE

EXT

REF

AD780/REF192

WITH VDD = 5V

OR REF191 WITH

VDD = 2.5V

VOUT

SYNC

VOUTA

VOUTB

VREFA

VREFB

1µF

VDD = 2.5V to 5.5V

VDD

Figure 38. AD5302/AD5312/AD5322 Using External Reference

If an output range of 0 V to VDD is required when the reference

inputs are configured as unbuffered (for example, 0 V to 5 V),

the simplest solution is to connect the reference inputs to VDD.

As this supply cannot be very accurate and can be noisy, the

AD5302/AD5312/AD5322 can be powered from the reference

voltage, for example, a 5 V reference such as the REF195, as

shown in Figure 39. The REF195 outputs a steady supply

voltage for the AD5302/AD5312/AD5322. The current required

from the REF195 is 300 μA supply current and approximately

30 μA into each reference input. This is with no load on the

DAC outputs. When the DAC outputs are loaded, the REF195

also needs to supply the current to the loads. The total current

required (with a 10 kΩ load on each output) is

μA

360

⎟

⎠

⎞

⎜

⎝

⎛

The load regulation of the REF195 is typically 2 ppm/mA,

which results in an error of 2.7 ppm (13.5 μV) for the 1.36 mA

current drawn from it. This corresponds to a 0.0007 LSB error

at eight bits and a 0.011 LSB error at 12 bits.

SCLK

DIN

GND

AD5302/AD5312/

AD5322

SERIAL

INTERFACE

REF195

VOUT

SYNC

VOUTA

VOUTB

VDD

VREFA

1µF

6V to 16V

GND

VIN

VREFB

0.1µF

10µF

Figure 39. Using a REF195 as Power and Reference to the

AD5302/AD5312/AD5322

BIPOLAR OPERATION USING THE

AD5302/AD5312/AD5322

The AD5302/AD5312/AD5322 are designed for single-supply

operation, but bipolar operation is also achievable using the

circuit shown in Figure 40. This circuit is configured to achieve

an output voltage range of –5 V < VOUT < +5 V. Rail-to-rail

operation at the amplifier output is achievable using an AD820

or OP295 as the output amplifier.

SCLK

DIN

GND

AD5302/AD5312/

AD5322

SERIAL

INTERFACE

REF195

VOUT

SYNC

VOUTA/B

VREFA/B

1µF

GND

VIN

6V to 16V

0.1µF

10µF

VDD

VDD = 5V

+5V

–5V

10kΩ

AD820/

OP295

10kΩ

±5V

Figure 40. Bipolar Operation Using the AD5302/AD5312/AD5322

The output voltage for any input code can be calculated as

follows:

(

) ()

()

REF

OUT

−

⎥

⎦

⎤

⎢

⎣

⎡

where:

D is the decimal equivalent of the code loaded to the DAC.

N is the DAC resolution.

VREF is the reference voltage input.

If VREF = 5 V, R1 = R2 = 1 kΩ, and VDD = 5 V:

(

) V

−

OUT

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