PIC24FJ256GA110_10 datasheet(66/330 Pages) MICROCHIP

66 / 330 page

PIC24FJ256GA110 FAMILY

DS39905E-page 66

 2010 Microchip Technology Inc.

RCON: RESET CONTROL REGISTER(1)

R/W-0

U-0

R/W-0

TRAPR

IOPUWR

—

—CM

PMSLP

bit 15

bit 8

R/W-0

R/W-1

EXTR

SWR

SWDTEN(2)

WDTO

SLEEP

IDLE

BOR

POR

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

TRAPR:

Trap Reset Flag bit

= A Trap Conflict Reset has occurred

= A Trap Conflict Reset has not occurred

bit 14

IOPUWR:

Illegal Opcode or Uninitialized W Access Reset Flag bit

= An illegal opcode detection, an illegal address mode or uninitialized W register used as an Address

Pointer caused a Reset

= An illegal opcode or uninitialized W Reset has not occurred

bit 13-10

Unimplemented:

Read as ‘0’

bit 9

CM:

Configuration Word Mismatch Reset Flag bit

= A Configuration Word Mismatch Reset has occurred

= A Configuration Word Mismatch Reset has not occurred

bit 8

PMSLP:

Program Memory Power During Sleep bit

= Program memory bias voltage remains powered during Sleep

= Program memory bias voltage is powered down during Sleep and voltage regulator enters Standby mode

bit 7

EXTR:

External Reset (MCLR) Pin bit

= A Master Clear (pin) Reset has occurred

= A Master Clear (pin) Reset has not occurred

bit 6

SWR:

Software Reset (Instruction) Flag bit

= A RESET instruction has been executed

= A RESET instruction has not been executed

bit 5

SWDTEN:

Software Enable/Disable of WDT bit(2)

= WDT is enabled

= WDT is disabled

bit 4

WDTO:

Watchdog Timer Time-out Flag bit

= WDT time-out has occurred

= WDT time-out has not occurred

bit 3

SLEEP:

Wake From Sleep Flag bit

= Device has been in Sleep mode

= Device has not been in Sleep mode

bit 2

IDLE:

Wake-up From Idle Flag bit

= Device has been in Idle mode

= Device has not been in Idle mode

bit 1

BOR:

Brown-out Reset Flag bit

= A Brown-out Reset has occurred. Note that BOR is also set after a Power-on Reset.

= A Brown-out Reset has not occurred

bit 0

POR:

Power-on Reset Flag bit

= A Power-on Reset has occurred

= A Power-on Reset has not occurred

Note 1:

All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not

cause a device Reset.

If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the

SWDTEN bit setting.

PIC24FJ256GA110 датащи(PDF) 66 Page - Microchip Technology

PIC24FJ256GA110 датащи(HTML) 66 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL