MPC950 MPC951

TIMING SOLUTIONS

BR1333 — Rev 6

9

MOTOROLA

limits can be provided. The data generated does give a good

indication of the general performance, a performance that in

most cases is well within the requirements of today’s

microprocessors.

Finally from the data there are some general guidelines

that, if followed, will minimize the output jitter of the device.

First and foremost always configure the device such that the

VCO runs as fast as possible. This is by far the most critical

parameter in minimizing jitter. Second keep the reference

frequency as high as possible. More frequent updates at the

phase detector will help to reduce jitter. Note that if there is a

tradeoff between higher reference frequencies and higher

VCO frequency always chose the higher VCO frequency to

minimize jitter. The third guideline may be the most difficult,

and in some cases impossible, to follow. Try to minimize the

number of different frequencies sourced from a single chip.

The fixed edge displacement associated with the switching

noise in most cases nearly doubles the “effective” jitter of a

high speed output.

Power Supply Filtering

The MPC950/951 is a mixed analog/digital product and as

such it exhibits some sensitivities that would not necessarily

be seen on a fully digital product. Analog circuitry is naturally

susceptible to random noise, especially if this noise is seen

on the power supply pins. The MPC950/951 provides

separate power supplies for the output buffers (VCCO) and

the phase–locked loop (VCCA) of the device. The purpose of

this design technique is to try and isolate the high switching

noise digital outputs from the relatively sensitive internal

analog phase–locked loop. In a controlled environment such

as an evaluation board this level of isolation is sufficient.

However, in a digital system environment where it is more

difficult to minimize noise on the power supplies a second

level of isolation may be required. The simplest form of

isolation is a power supply filter on the VCCA pin for the

MPC950/951.

Figure 10 illustrates a typical power supply filter scheme.

The MPC950/951 is most susceptible to noise with spectral

content in the 1KHz to 1MHz range. Therefore the filter

should be designed to target this range. The key parameter

that needs to be met in the final filter design is the DC voltage

drop that will be seen between the VCC supply and the VCCA

pin of the MPC950/951. From the data sheet the IVCCA

current (the current sourced through the VCCA pin) is

typically 15mA (20mA maximum), assuming that a minimum

of 3.0V must be maintained on the VCCA pin very little DC

voltage drop can be tolerated when a 3.3V VCC supply is

used. The resistor shown in Figure 10 must have a

resistance of 10–15

Ω to meet the voltage drop criteria. The

RC filter pictured will provide a broadband filter with

approximately 100:1 attenuation for noise whose spectral

content is above 20KHz. As the noise frequency crosses the

series resonant point of an individual capacitor it’s overall

impedance begins to look inductive and thus increases with

increasing frequency. The parallel capacitor combination

shown ensures that a low impedance path to ground exists

for frequencies well above the bandwidth of the PLL. It is

recommended that the user start with an 8–10

Ω resistor to

avoid potential VCC drop problems and only move to the

higher value resistors when a higher level of attenuation is

shown to be needed.

Figure 10. Power Supply Filter

PLL_VCC

VCC

MPC950/951

0.01

µF

22

µF

0.01

µF

3.3V

RS=5–15Ω

Although the MPC950/951 has several design features to

minimize the susceptibility to power supply noise (isolated

power and grounds and fully differential PLL) there still may

be applications in which overall performance is being

degraded due to system power supply noise. The power

supply filter schemes discussed in this section should be

adequate to eliminate power supply noise related problems

in most designs.

Using the On–Board Crystal Oscillator

The MPC950/951 features an on–board crystal oscillator

to allow for seed clock generation as well as final distribution.

The on–board oscillator is completely self contained so that

the only external component required is the crystal. As the

oscillator is somewhat sensitive to loading on its inputs the

user is advised to mount the crystal as close to the

MPC950/951 as possible to avoid any board level parasitics.

To facilitate co–location surface mount crystals are

recommended, but not required.