MPC950 MPC951

MOTOROLA

TIMING SOLUTIONS

BR1333 — Rev 6

8

switching at the same frequency the total jitter is exactly

equal to the PLL jitter. In a device, like the MPC950/951,

where a number of the outputs can be switching

synchronously but at different frequencies a “multi–modal”

jitter distribution can be seen on the highest frequency

outputs. Because the output being monitored is affected by

the activity on the other outputs it is important to consider

what is happening on those other outputs. From Figure 9,

one can see for each rising edge on the higher frequency

signal the activity on the lower frequency signal is not

constant. The activity on the other outputs tends to alter the

internal thresholds of the device such that the placement of

the edge being monitored is displaced in time. Because the

signals are synchronous the relationship is periodic and the

resulting jitter is a compilation of the PLL jitter superimposed

on the displaced edges. When histograms are plotted the

jitter looks like a “multi–modal” distribution as pictured in

Figure 9. Depending on the size of the PLL jitter and the

relative displacement of the edges the “multi–modal”

distribution will appear truly “multi–modal” or simply like a

“fat” Gaussian distribution. Again note that in the case where

all the outputs are switching at the same frequency there is

no edge displacement and the jitter is reduced to that of

the PLL.

Figure 7. PLL Jitter and Edge Displacement

1

212

12

1

232

12

12

3

3

Peak–to–Peak PLL Jitter

Peak–to–Peak Period Jitter

Peak–to–Peak PLL Jitter

Peak–to–Peak Period Jitter

Figure 10 graphically represents the PLL jitter of the

MPC950/951. The data was taken for several different output

configurations. By triggering on the lowest frequency output

the PLL jitter can be measured for configurations in which

outputs are switching at different frequencies. As one can

see in the figure the PLL jitter is much less dependent on

output configuration than on internal VCO frequency.

Figure 8. RMS PLL Jitter versus VCO Frequency

0

5

10

15

20

25

30

35

40

160

240

320

400

480

560

Conf 1

Conf 2

Conf 3

Conf 1 = All Outputs at the Same Frequency

Conf 2 = 4 Outputs at X, 5 Outputs at X/2

Conf 3 = 1 Output at X, 8 Outputs at X/4

VCO Frequency (MHz)

Figure 9. Peak–to–Peak Period Jitter versus

VCO Frequency

150

200

250

300

350

400

160

240

320

400

480

560

Conf 2

Conf 3

Conf 2 = 4 Outputs at X, 5 Outputs at X/2

Conf 3 = 1 Output at X, 8 Outputs at X/4

VCO Frequency (MHz)

Two different configurations were chosen to look at the

period displacement caused by the switching outputs.

Configuration 3 is considered worst case as the “trimodal”

distribution (as pictured in Figure 9) represents the largest

spread between distribution peaks. Configuration 2 is

considered a typical configuration with half the outputs at a

high frequency and the remaining outputs at one half the high

frequency. For these cases the peak–to–peak numbers are

reported in Figure 11 as the sigma numbers are useless

because the distributions are not Gaussian. For situations

where the outputs are synchronous and switching at different

frequencies the measurement technique described here is

insufficient to use for establishing guaranteed limits. Other

techniques are currently being investigated to identify a more

accurate and repeatable measurement so that guaranteed