ADP3801 datasheet(18/20 Pages) AD

18 / 20 page

ADP3801/ADP3802

–18–

REV. 0

VCC Greater Than 20 V Operation

Some ac/dc adapters have a poorly regulated output voltage

that can rise above the 20 V maximum operating voltage of the

ADP3801/ADP3802. The circuit in Figure 34 uses a Zener

diode and an NPN transistor to extend the ADP3801/ADP3802’s

maximum input voltage. The Zener should be at least 3 V higher

than the final battery voltage to meet the minimum headroom

requirements. 3 V is used to account for the VBE drop of the

2N3904 transistor and additional losses in the circuit. If VIN

drops below the value of the Zener diode, VCC is no longer

regulated and it tracks VIN. If the 2 V of headroom on the cur-

rent sense pins is not maintained, then the circuits of Figures 32

and 33 can also be used in conjunction with the circuit of Figure

34.

VCC

DRV

EOC

CS–

CS+

ISET

BATA

BAT

ADJ

GND

RESET

VIN

100k

ADP3801/ADP3802

2N3904

0.1 F

BATB

10k

3.3V

33 H

40m

A/B

COMP

140 F

PROG

Figure 34. VCC Greater Than 20 V Operation

The gate drive of the PFET is capacitively coupled to the DRV

pin with a 0.1

µF capacitor. While the DRV pin is switching, the

voltage swing on the DRV pin is coupled to the gate, but the dc

voltage is blocked. This allows the gate of the PFET to be at a

voltage that is higher than the absolute maximum rating of the

DRV pin. The 9 V Zener diode limits the gate drive voltage and

the 100 k

Ω resistor provides a dc pull-up to turn the PFET off

when the DRV pin is not switching.

System Current Sense Reduces Charge Current

In many applications the power required for the system and the

battery charger exceeds the total power available from the ac/dc

adapter. A design where battery charger current is decreased as

the system current increases helps to keep a constant power

demand on the brick. Dynamically adjusting the charge current

keeps the total power output of the brick constant. The circuit

in Figure 35 uses an external low cost amplifier to sense the

system current and dynamically control the ADP3801/ADP3802’s

charge current.

The current setting voltage is produced by R3 and R4 according

to the following formula:

SET

≈×









This equation is approximate because the impedance of R2 and

R1 does effect the resistor divider of R3 and R4, but the impact

is small. As the system current increases, the voltage across RSS

also increases. This voltage is subtracted from VISET with a gain

set by R1 and R2. As the graph in Figure 35 shows, the charge

current reduces as the system current increases, and eventually

the charge current becomes zero (IZERO). The system current at

which this occurs can be set by selecting R1 and R2 according

to the following formula:

ISET

ZERO

≈×











 ×

Because the AD8531 is a single supply amplifier with its nega-

tive rail at ground, its output does not go below 0.0 V, so any

further increase in system current does not change VISET. De-

signing a charger with a maximum charge current of 3A (RCS =

0.05

Ω) which reduces to zero when the system current reaches

7A (RSS = 0.025 Ω) results in the following resistor values: R1 =

100 k

Ω, R2 = 820 kΩ, R3 = 8.3 kΩ, R4 = 10 kΩ.

VCC

DRV

CS–

CS+

ISET

VBAT

BAT

0.1 F

RSS

ADP3801/ADP3802

IBAT

AC/DC

BRICK

8.3k

SYSTEM

VCC

10k

100k

ISYSTEM

820k

100k

RCS

100k

IZERO

(ISET) = MAXIMUM CHARGE CURRENT

IBAT

ISYSTEM

OP193

Figure 35. System Current Sense Reduces Charge Current

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