ADP3801 datasheet(8/20 Pages) AD

8 / 20 page

ADP3801/ADP3802

–8–

REV. 0

BIAS

LDO

RESET

GATE

DRIVE

VIN

CS+

OSCILLATOR

RCS

VREF

3.3V

UVLO

BATA

ISET

A/B

CS–

(FROM

Rf2

Rf1

COMP

1 F

VREF

POWER-

RESET

(FROM

(TO

FINAL

VBAT

PROG

GND

MUX

PROG

(FROM

2.475V

ADJ

VCC

VREF

DRV

BATA

1 F

CIN

COUT

EOC

ADP3801/ADP3802

100k

BATB

GM1

GM2

GM3

100k

VREF

Figure 20. Simplified Application Diagram

Setting the Final Battery Voltage

The final battery voltage is determined by the voltage on the

Battery Programming (PROG) pin. This pin controls the state

of the PROG multiplexer, which selects the appropriate tap

from the internal battery voltage resistor divider. The specifica-

tion table details the PROG voltages for each final battery volt-

age. A resistor divider from the LDO can be used to set the

PROG voltage as shown in Figure 21. To provide fail safe op-

eration, a PROG voltage equal to 0.0 V or 3.3 V results in the

minimum final battery voltage of 4.2 V. The PROG input is

high impedance, so the voltage can be set with a high imped-

ance resistor divider from VL. Alternatively, a PWM output

from a microcontroller can be used with an RC filter to generate

the desired threshold voltage.

4.2

VT1 = 0.0V

8.4

VT2 = 1.1V

200k

100k

12.6

VT3 = 2.2V

100k

200k

VBAT

SETTING

R1 (5%)

R2 (5%)

PROG

* CONNECT PROG TO

GND FOR VBAT = 4.2V

Figure 21. Resistor Divider Sets the Final Battery Voltage

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