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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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RT8113 датащи(PDF) 13 Page - Richtek Technology Corporation |
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RT8113 датащи(HTML) 13 Page - Richtek Technology Corporation |
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13 / 21 page  RT8113 13 DS8113-02 April 2011 www.richtek.com After VOUT ramps to VBOOT, the RT8113 stays in this state for 800 μs (tD3) waiting for valid VID code sent by CPU. After receiving valid VID code, VOUT continues ramping up or down to the voltage specified by VID code. After VOUT ramps to VEAP = VDAC − VADJ, the RT8113 stays in this state for 1600 μs (tD5) and then asserts PGOOD = high. The ramping slew rate of tD2 and tD4 is controlled by the external capacitor connected to SS pin. The voltage of Figure 3. Circuit for Soft-Start and Dynamic VID Figure 4. Soft-Start Wave forms Soft Start Circuit VDAC ISS EAP (Error AMP Positive Input) Soft Start Current (ISS) is Limited and Variant R2 R1 R3 C2 C1 C3 VOUT FB COMP ADJ SS CSS RADJ + - EA VCC12 VCC5 9.6V 4.6V VDAC SS PGOOD tD1 VOUT VBOOT tD2 tD3 tD4 tD5 the SS pin will always be VEAP+0.7V, where the mentioned 0.7V is the typical turn-on threshold of an internal power switch. Before PGOOD = high, the slew rate of VEAP is limited to 16 μA/CSS. When PGOOD = high, the slew rate of VEAP is limited to 160 μA/CSS, which is 10 times faster than soft start slew rate for dynamic VID feature. The soft start waveform is shown in Figure 4. |
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