S29CD032J datasheet(33/81 Pages) SPANSION

33 / 81 page

October 11, 2012 S29CD-J_CL-J_00_B7

S29CD-J and S29CL-J Flash Family

Data

She e t

8.7.2

Sector Erase

The sector erase function erases one or more sectors in the memory array. (See Table 20.1, Memory Array

Command Definitions (x32 Mode) on page 75 and Figure 8.6, Erase Operation on page 34.) The device

does not require the system to preprogram prior to erase. The Embedded Erase algorithm automatically

programs and verifies the entire memory for an all-zero data pattern prior to electrical erase. After a

successful sector erase, all locations within the erased sector contain FFFFh. The system is not required to

provide any controls or timings during these operations.

After the command sequence is written, a sector erase time-out of no less than 80 µs occurs. During the time-

out period, additional sector addresses and sector erase commands may be written. Loading the sector erase

buffer may be done in any sequence, and the number of sectors may be from one sector to all sectors. The

time between these additional cycles must be less than 80 µs. Any sector erase address and command

following the exceeded time-out (80 µs) may or may not be accepted. A time-out of 80 µs from the rising edge

of the last WE# (or CE#) initiates the execution of the Sector Erase command(s). If another falling edge of the

WE# (or CE#) occurs within the 80 µs time-out window, the timer is reset. Any command other than Erase

Suspend during the time-out period will be interpreted as an additional sector to erase. The device does not

decode the data bus, but latches the address. (See S29CD016J Sector Erase Time-Out Functionality

Application Note for further information.). The system can monitor DQ3 to determine if the sector erase timer

has timed out (See DQ3: Sector Erase Timer on page 42.) The time-out begins from the rising edge of the

final WE# pulse in the command sequence.

When the Embedded Erase algorithm is complete, the bank returns to reading array data; addresses are no

longer latched. The system can determine the status of the erase operation by reading DQ7 or DQ6/DQ2 in

the erasing bank. Refer to Write Operation Status on page 36 for information on these status bits.

Once the sector erase operation has begun, only the Erase Suspend command is valid. All other commands

are ignored. However, note that a hardware reset immediately terminates the erase operation. If that occurs,

the sector erase command sequence should be re-initiated once that bank has returned to reading array

data, in order to ensure data integrity.

Figure 8.6 on page 34 illustrates the algorithm for the erase operation. Refer to Program/Erase Operations

on page 31 for parameters and timing diagrams.

8.7.3

Chip Erase

Chip erase is a six-bus cycle operation as indicated by Command Definitions on page 75. The Chip Erase

command is used to erase the entire flash memory contents of the chip by issuing a single command.

However, chip erase does not erase protected sectors.

This command invokes the Embedded Erase algorithm, which does not require the system to preprogram

prior to erase. The Embedded Erase algorithm automatically preprograms and verifies the entire memory for

an all-zero data pattern prior to electrical erase. After a successful chip erase, all locations of the chip contain

FFFFh. The system is not required to provide any controls or timings during these operations. Command

Definitions on page 75 in the appendix shows the address and data requirements for the chip erase

command sequence.

When the Embedded Erase algorithm is complete, that bank returns to the read mode and addresses are no

longer latched. The system can determine the status of the erase operation by using DQ7, DQ6 or the RY/

BY#. Refer to Write Operation Status on page 36 for information on these status bits.

Any commands written during the chip erase operation are ignored. However, note that a hardware reset

immediately terminates the erase operation. If that occurs, the chip erase command sequence should be

reinitiated once that bank has returned to reading array data, to ensure data integrity.

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