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CXD3003 датащи(PDF) 123 Page - Sony Corporation |
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CXD3003 датащи(HTML) 123 Page - Sony Corporation |
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123 / 137 page ![]() – 123 – CXD3003R $3F (preset: $3F 00 00) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 AGG4 XT4D XT2D 0 DRR2 DRR1 DRR0 0 ASFG FTQ LPAS SRO1 SRO0 AGHF 0 XT4D, XT2D: MCK (digital servo master clock) frequency division setting This command forcibly sets the frequency division ratio to 1/4, 1/2 or 1/1 when MCK is generated from the signal input to the FSTI pin. See the description of $3E for XT1D. AGG4: This varies the amplitude of the internally generated sine wave using the AGGF and AGGT commands during AGC. When AGG4 = 0, the default is used. When AGG4 = 1, the setting is as shown in the table below. AGGF (MSB) 0 0 1 1 0 1 0 1 1/64 × VDD/2 1/32 × VDD/2 1/16 × VDD/2 1/8 × VDD/2 AGGT (LSB) TE/FE input conversion DRR2 to DRR0: Partially clears the Data RAM values (0 write). The following values are cleared when set to 1 (on) respectively; default = 0 DRR2: M08, M09, M0A DRR1: M00, M01, M02 DRR0: M00, M01, M02 only when LOCK = low Note) Set DRR1 and DRR0 on for 50µs or more. ASFG: When vibration detection is performed during anti-shock circuit operation, FCS servo filter is forcibly set to gain normal status. On when set to 1; default = 0 LPAS: Built-in analog buffer low-current consumption mode This mode reduces the total analog buffer current consumption for the VC, TE, SE and FE input analog buffers by using a single operational amplifier. On when set to 1; default = 0 Note) When using this mode, first check whether each error signal is properly A/D converted using the SRO1 and SRO0 commands of $3F. SRO1, SRO0: These commands are used to output various data externally continuously which have been specified with the $39 command. (However, D15 (DAC) of $39 must be set to 1.) Digital output (SOCK, XOLT and SOUT) can be obtained from three specified pins by setting these commands to 1 respectively. The default is 0, 0. (no readout) The output pins for each case are shown below. SOCK XOLT SOUT DA13 pin DA12 pin DA14 pin DA10 pin DA09 pin DA11 pin SRO1 = 1 SRO0 = 1 (See "Description of Data Readout" on the following page.) AGHF: This halves the frequency of the internally generated sine wave during AGC. FTQ: The slope of the output during focus search is a quarter of the conventional output slope. These settings are the same for both focus auto gain control and tracking auto gain control. ∗: preset, —: don't care ∗ XT1D 0 1 0 0 XT2D 0 — 1 0 XT4D 0 — — 1 According to XTSL 1/1 1/2 1/4 Frequency division ratio ∗ ∗: preset |
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