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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CXD3003 датащи(PDF) 118 Page - Sony Corporation |
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CXD3003 датащи(HTML) 118 Page - Sony Corporation |
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118 / 137 page  – 118 – CXD3003R SDF2, SDF1: DFCT slice level Default value: 10 (0.0313 × VDDV) RFDC input conversion SDF2 0 0 1 1 0 1 0 1 0.0156 × VDD 0.0234 × VDD 0.0313 × VDD 0.0391 × VDD SDF1 Slice level MAX2, MAX1: DFCT maximum time Default value: 00 (no timer limit) MAX2 0 0 1 1 0 1 0 1 No timer limit 2.00ms 2.36 2.72 MAX1 DFCT maximum time BTF: Bottom hold double-speed count-up mode for MIRR signal generation On/off (default: off) On when set to 1. D2V2, D2V1: Peak hold 2 for DFCT signal generation Count-down speed setting Default value: 01 (0.086 × VDD V/ms, 44.1kHz) [V/ms] unit items indicate RFDC input conversion; [kHz] unit items indicate the operating frequency of the internal counter. D1V2, D1V1: Peak hold 1 for DFCT signal generation Count-down speed setting Default value: 01 (0.688 × VDD V/ms, 352.8kHz) [V/ms] unit items indicate RFDC input conversion; [kHz] unit items indicate the operating frequency of the internal counter. RINT: This initializes the initial-state registers of the circuits which generate MIRR, DFCT and FOK. D2V2 0 0 1 1 0 1 0 1 22.05 44.1 88.2 176.4 0.0431 × VDD 0.0861 × VDD 0.172 × VDD 0.344 × VDD D2V1 Count-down speed [V/ms] [kHz] 176.4 352.8 705.6 1411.2 0.344 × VDD 0.688 × VDD 1.38 × VDD 2.75 × VDD D1V2 0 0 1 1 0 1 0 1 D1V1 Count-down speed [V/ms] [kHz] ∗: preset, VDD: supply voltage ∗ ∗: preset, VDD: supply voltage ∗ ∗: preset, VDD: supply voltage ∗ ∗: preset ∗ |
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