TPS65708

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SLVSAE1A

– OCTOBER 2010 – REVISED FEBRUARY 2011

180

° OUT-OF-PHASE OPERATION

In PWM Mode, the converters operate with a 180

° turn-on phase shift of the PMOS (high side) transistors. This

prevents the high-side switches of both converters from being turned on simultaneously, and therefore smooths

the input current. This feature reduces the surge current drawn from the supply.

UNDERVOLTAGE LOCKOUT / ENABLE for DCDC1, DCDC2, LDO1, and LDO2

The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from

excessive discharge of the battery. It disables the dcdc converters and LDOs at too low input voltages.

As TPS65708 does not have enable pins for the dcdc converters and LDOs, the internal undervoltage lockout

not only serves as a protection circuit but also as an enable circuitry. The supply voltage to TPS65708 is

converter and LDOs are set HIGH to start-up the outputs in the pre-defined sequence. When the supply voltage

drops below 3.6V, the dcdc converters and LDOs are disabled again and the discharge circuitry is enabled to

make sure the voltage at the output capacitor ramps down quickly. Disabling the dcdc converter or LDO, forces

the device into shutdown, with a shutdown quiescent current as defined in the electrical characteristics. In this

mode, the power FETs are turned-off and the entire internal control circuitry is switched-off.

OUTPUT VOLTAGE DISCHARGE

The dcdc converters and LDOs contain an output capacitor discharge feature which makes sure that the

capacitor is discharged when the supply voltage drops below the undervoltage lockout threshold. The discharge

dropped below its undervoltage lockout threshold. This will make sure that the cap is discharged even the supply

about 2.1V until the voltage exceeded the undervoltage lockout threshold that enables the power-up sequencing.

POWER-UP SEQUENCING

There are 3 different power-up sequencing options available. The options are factory set and can not be

changed by the user. Contact TI if an option different from the default is needed.

1. DCDC1, DCDC2, LDO1, and LDO2 are turning on at the same time.

2. DCDC1 first, when power good, LDO1 is enabled, when power good, DCDC2 is enabled when power good,

LDO2 is enabled

3. DCDC2 first, when power good, LDO2 is enabled, when power good, DCDC1 is enabled when power good,

LDO1 is enabled

TPS65708 is set to option 2 such that DCDC1 starts first followed by LDO1, DCDC2, and LDO2. See also the

timing diagram under the table of graphs.

SHORT-CIRCUIT PROTECTION

All outputs are short circuit protected with a maximum output current as defined in the electrical specifications.

THERMAL SHUTDOWN

goes into thermal shutdown. In this case, the low side and high side MOSFETs for the dcdc converters as well

as the LDOs are turned-off. The device continues its operation and powers up the dcdc converters and LDOs

with the pre-defined sequencing when the junction temperature falls below the thermal shutdown hysteresis

again. During thermal shutdown also the LED driver is disabled.

LDOs

The low dropout voltage regulators are designed to operate well with low value ceramic input and output

capacitors. They operate with input voltages down to 1.7V. Both LDOs offer a maximum dropout voltage of

300mV at rated output current. The LDOs support a current limit feature.

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