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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TPS65708 датащи(PDF) 4 Page - Texas Instruments |
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TPS65708 датащи(HTML) 4 Page - Texas Instruments |
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4 / 22 page  TPS65708 SLVSAE1A – OCTOBER 2010 – REVISED FEBRUARY 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Unless otherwise noted: VIN1 = VIN2 = VCC = 5V, L = 1.5 µH, COUTDCDCx = 10µF, COUTLDOx = 2.2µF, TA = –40°C to 85°C. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OSCILLATOR fSW Oscillator frequency 2.03 2.25 2.48 MHz OUTPUT VOUT1 DCDC1 default output voltage VIN1 ≥ 3.6V 3.3 V VOUT2 DCDC2 default output voltage VIN2 ≥ 3.6V 1.8 V dcdc converter input voltage below IFB FB pin input current 0.1 µA undervoltage lockout threshold FB pin input resistance due to internal dcdc converter input voltage above RFB 990 k Ω voltage divider undervoltage lockout threshold; VOUT = 3.3V FB pin input resistance due to internal dcdc converter input voltage above RFB 585 k Ω voltage divider undervoltage lockout threshold; VOUT = 1.8V VIN1 and VIN2 = 3.6V to 6V, +1% voltage DC output voltage accuracy(1) positioning active; PFM operation, 1.25% 3% 0 mA < IOUT < IOUTmax VOUT VIN1 / VIN2 = 3.3V to 6V, PWM operation, DC output voltage accuracy –1.5% 1.5% 0 mA < IOUT < IOUTmax DC output voltage load regulation PWM operation 0.5 %/A Time from UVLO is exceeded (Vin > 3.6V) to tStart Start-up time 200 µs Start switching tRamp VOUT ramp time Time to ramp from 5% to 95% of VOUT 250 µs RDIS Internal discharge resistor at L1 and L2 DCDCx disabled; 1V < VIN1/2 < 3.6V 300 400 550 Ω THERMAL PROTECTION SEPARATELY FOR DCDC1, DCDC2 and LDO1 TSD Thermal shutdown Increasing junction temperature 150 °C Thermal shutdown hysteresis Decreasing junction temperature 30 °C VLDO1, VLDO2 LOW DROPOUT REGULATOR VINLDO Input voltage range for LDO1 and LDO2 1.7 6 V VLDO1 LDO1 Default Output Voltage (1) 2.8 V VLDO2 LDO2 Default Output Voltage 1.2 V IO Output current for LDO1 and LDO2 200 mA ISC LDO1 and LDO2 short circuit current limit VLDOx = GND 260 360 550 mA Dropout voltage at LDOx IO = 200mA; VINLDOx = 3.3V 200 mV Dropout voltage at LDOx IO = 200mA; VINLDOx = 1.8V 300 mV Output voltage accuracy for LDO1 and IO = 200mA –2% 2% LDO2 VINLDO = VLDO + 0.5V (min 1.7V) to 6V, Line regulation for LDO1 and LDO2 –1% 1% IO = 50mA Load regulation for LDO1 and LDO2 IO = mA to 200mA –1.5 1 % f = 10kHz, COUT ≥ 2.2μF VINLDOx = 5V, VOUT PSRR Power-Supply Rejection Ratio 50 dB = 2.8V, IOUT = 100mA µV Vn Output noise voltage VOUT = 2.8V, BW = 10Hz to 100kHz 160 RMS Internal soft-start when LDO is enabled; tRamp VOUT ramp time 250 µs Time to ramp from 5% to 95% of VOUT Internal discharge resistor at VLDO1 and RDIS VIN < UVLO 200 400 550 Ω VLDO2 (1) VINLDO > 2.8V 4 Submit Documentation Feedback © 2010–2011, Texas Instruments Incorporated Product Folder Link(s) :TPS65708 |
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