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AFE5808A датащи(PDF) 48 Page - Texas Instruments |
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AFE5808A датащи(HTML) 48 Page - Texas Instruments |
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48 / 66 page ![]() S0498-01 CLAMP AFE LNAx DC Offset Correction ACTx C ACT C IN C BYPASS INPx INMx Input Optional Diodes AFE5808A SLOS729B – OCTOBER 2011 – REVISED APRIL 2012 www.ti.com A typical application circuit diagram is listed above. The configuration for each block is discussed below. LNA CONFIGURATION LNA Input Coupling and Decoupling The LNA closed-loop architecture is internally compensated for maximum stability without the need of external compensation components. The LNA inputs are biased at 2.4 V and AC coupling is required. A typical input configuration is shown in Figure 83. CIN is the input AC coupling capacitor. CACT is a part of the active termination feedback path. Even if the active termination is not used, the CACT is required for the clamp functionality. Recommended values for CACT = 1 µF and CIN are ≥ 0.1 µF. A pair of clamping diodes is commonly placed between the T/R switch and the LNA input. Schottky diodes with suitable forward drop voltage (e.g. the BAT754/54 series, the BAS40 series, the MMBD7000 series, or similar) can be considered depending on the transducer echo amplitude. Figure 83. LNA Input Configurations This architecture minimizes any loading of the signal source that may otherwise lead to a frequency-dependent voltage divider. The closed-loop design yields low offsets and offset drift. CBYPASS (≥0.015 µF) is used to set the high-pass filter cut-off frequency and decouple the complimentary input. Its cut-off frequency is inversely proportional to the CBYPASS value, The HPF cut-off frequency can be adjusted through the register 59[3:2] a Table 11 lists. Low frequency signals at T/R switch output, such as signals with slow ringing, can be filtered out. In addition, the HPF can minimize system noise from DC-DC converters, pulse repetition frequency (PRF) trigger, and frame clock. Most ultrasound systems’ signal processing unit includes digital high-pass filters or band-pass filters (BPFs) in FPGAs or ASICs. Further noise suppression can be achieved in these blocks. In addition, a digital HPF is available in the AFE5808A ADC. If low frequency signal detection is desired in some applications, the LNA HPF can be disabled. Table 11. LNA HPF Settings (CBYPASS = 15 nF) Reg59[3:2] (0x3B[3:2]) Frequency 00 100 KHz 01 50 KHz 10 200 KHz 11 150 KHz 48 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): AFE5808A |
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