Sensors

Freescale Semiconductor, Inc.

19

MMA685x

3.1.10.4

Device Initialization Flag (DEVINIT)

The device initialization flag is set during the interval between negation of internal reset and completion of internal device ini-

tialization. DEVINIT is cleared automatically. The device initialization flag is not affected by a read of the DEVSTAT register.

3.1.10.5

SPI MISO Data Mismatch Error Flag (MISOERR)

The MISO data mismatch flag is set when a MISO Data mismatch fault occurs as specified in Section 4.5.2. The MISOERR

flag is cleared by a read of the DEVSTAT register.

3.1.10.6

Offset Monitor Over Range Flags (OFFSET)

The offset monitor over range flag is set if the acceleration signal reaches the specified offset limit. The offset monitor over

range flags are cleared by a read of the DEVSTAT register.

3.1.10.7

Device Reset Flag (DEVRES)

The device reset flag is set during device initialization following a device reset. The device reset flag is cleared by a read of

the DEVSTAT register.

3.1.11 Count Register (COUNT)

The count register is a read-only register which provides the current value of a free-running 8-bit counter derived from the pri-

mary oscillator. A 10-bit pre-scaler divides the primary oscillator frequency by 1024. Thus, the value in the register increases by

one count every 128

μs and the counter rolls over every 32.768 ms.

3.1.12 Offset Correction Value Registers (OFFCORR)

The offset correction value register is a read-only register which contain the most recent offset correction increment / decre-

ment value from the offset cancellation circuit. The value stored in this register indicates the amount of offset correction being

applied to the SPI output data. The values have a resolution of 1 LSB.

3.1.13 Reserved Registers (Reserved)

Registers $1C and $1D are reserved. A write to the reserved bits must always be logic ‘0’ for normal device operation and

performance.

Table 20. Count Register

Location

Bit

Address

Register

76543210

$15

COUNT

COUNT[7]

COUNT[6]

COUNT[5]

COUNT[4]

COUNT[3]

COUNT[2]

COUNT[1]

COUNT[0]

Reset Value

00000000

Table 21. Offset Correction Value Register

Location

Bit

Address

Register

76543210

$16

OFFCORR_X

OFFCORR_X[7]

OFFCORR_X[6]

OFFCORR_X[5]

OFFCORR_X[4]

OFFCORR_X[3]

OFFCORR_X[2]

OFFCORR_X[1]

OFFCORR_X[0]

Reset Value

00000000

Table 22. Reserved Registers

Location

Bit

Address

Register

76543210

$1C

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

$1D

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reset Value

00000000