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LTC3630

3630fb

APPLICATIONS INFORMATION

The current that flows through the R3-R4 divider will

directly add to the shutdown, sleep, and active current

of the LTC3630, and care should be taken to minimize

the impact of this current on the overall efficiency of the

application circuit. To keep the variation of the rising VIN

UVLO threshold to less than 5% due to the internal pull-

up circuitry, the following equations should be used to

calculate R3 and R4:

≤

Rising VINUVLOThreshold

40μA

R3 • 1.21V

Rising VINUVLOThreshold – 1.21V +R3 • 4μA

The falling UVLO threshold will be about 10% lower than

the rising VIN UVLO threshold due to the 110mV hysteresis

of the RUN comparator.

For applications that do not require a precise UVLO, the

RUN pin can be left floating. In this configuration, the UVLO

threshold is limited to the internal VIN UVLO thresholds as

shown in the Electrical Characteristics table.

Be aware that the RUN pin cannot be allowed to exceed

its absolute maximum rating of 6V. To keep the voltage

on the RUN pin from exceeding 6V, the following relation

should be satisfied:

VIN(MAX) < 4.5 • Rising VIN UVLO Threshold

To support a VIN(MAX) greater than 4.5x the external UVLO

threshold, an external 4.7V Zener diode should be used

in parallel with R4. See Figure 11.

Soft-Start

Soft-start is implemented by ramping the effective refer-

ence voltage from 0V to 0.8V. To increase the duration of

soft-start, place a capacitor from the SS pin to ground.

An internal 5μA pull-up current will charge this capacitor.

The value of the soft-start capacitor can be calculated by

the following equation:

CSS = Soft-Start Time •

5μA

0.35V

The minimum soft-start time is limited to the internal soft-

start timer of 0.8ms. When the LTC3630 detects a fault

condition (input supply undervoltage or overtemperature)

or when the RUN pin falls below 1.1V, the SS pin is quickly

pulled to ground and the internal soft-start timer is reset.

This ensures an orderly restart when using an external

soft-start capacitor.

Note that the soft-start capacitor may not be the limiting

factor in the output voltage ramp. The maximum output

current, which is equal to half the peak current, must

charge the output capacitor from 0V to its regulated value.

For small peak currents or large output capacitors, this

ramp time can be significant. Therefore, the output voltage

ramp time from 0V to the regulated VOUT value is limited

to a minimum of:

Ramp Time

≥

2• COUT

IPEAK

VOUT

CISET Selection

Once the peak current resistor, RISET, and inductor are se-

lected to meet the load current and frequency requirements,

an optional capacitor, CISET, can be added in parallel with

RISET. This will boost efficiency at mid-loads and reduce

the output voltage ripple dependency on load current at the

expense of slightly degraded load step transient response.

The peak inductor current is controlled by the voltage on

the ISET pin. Current out of the ISET pin is 5μA while the

LTC3630 is switching and is reduced to 1μA during sleep

mode. The ISET current will return to 5μA on the first cycle

after sleep mode. Placing a parallel RC from the ISET pin to

ground filters the ISET voltage as the LTC3630 enters and

exits sleep mode which in turn will affect the output volt-

age ripple, efficiency and load step transient performance.

In general, when RISET is greater than 120k a CISET ca-

pacitor in the 100pF to 200pF range will improve most

performance parameters. When RISET is less than 100k,

the capacitance on the ISET pin should be minimized.

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