5

Integrated

Circuit

Systems, Inc.

ICS9LPRS480

1391D—02/02/09

TSSOP Pin Description

PIN #

PIN NAME

PIN TYPE

DESCRIPTION

1

REF1/SEL_SATA

I/O

14.318 MHz 3.3V reference clock./ 3.3V tolerant latched input to select function of SRC6/SATA output

0 = 100MHz differential spreading SRC clock, 1 = 100MHz non-spreading differential SATA clock

2

REF0/SEL_HTT66

I/O

14.318 MHz 3.3V reference clock./ 3.3V tolerant latched input to select Hyper Transport Clock

Frequency.

0 = 100MHz differential HTT clock, 1 = 66MHz 3.3V single ended HTT clock

3

GNDREF

GND

Ground pin for the REF outputs.

4

X1

IN

Crystal input, nominally 14.318MHz

5

X2

OUT

Crystal output, nominally 14.318MHz

6

VDD48

PWR

Power pin for the 48MHz outputs and core. 3.3V

7

48MHz_0

OUT

48MHz clock output.

8

GND48

GND

Ground pin for the 48MHz outputs

9

SMBCLK

IN

Clock pin of SMBus circuitry, 5V tolerant.

10

SMBDAT

I/O

Data pin for SMBus circuitry, 5V tolerant.

11

VDD27

PWR

3.3V Power supply for SRC/27MHz output and 27MHz SS PLL

12

SRC7C_LPRS/27MHz_NS

OUT

True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm

series resistor needed)/27MHz 3.3V Single-ended non-spread output for discrete graphics

13

SRC7T_LPRS/27MHz_SS

OUT

Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33

ohm series resistor needed)/27MHz 3.3V Single-ended spreading output for discrete graphics

14

GND27

GND

Ground for the SRC/27MHz outputs

15

SRC4C_LPRS

OUT

Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33

ohm series resistor needed)

16

SRC4T_LPRS

OUT

True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm

series resistor needed)

17

GNDSRC

GND

Ground pin for the SRC outputs

18

VDDSRC_IO

PWR

Power supply for differential SRC outputs, nominal 1.05V to 3.3V

19

SRC3C_LPRS

OUT

Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33

ohm series resistor needed)

20

SRC3T_LPRS

OUT

True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm

series resistor needed)

21

SRC2C_LPRS

OUT

Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33

ohm series resistor needed)

22

SRC2T_LPRS

OUT

True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm

series resistor needed)

23

VDDSRC

PWR

Supply for SRC core, 3.3V nominal

24

VDDSRC_IO

PWR

Power supply for differential SRC outputs, nominal 1.05V to 3.3V

25

GNDSRC

GND

Ground pin for the SRC outputs

26

SRC1C_LPRS

OUT

Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33

ohm series resistor needed)

27

SRC1T_LPRS

OUT

True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm

series resistor needed)

28

SRC0C_LPRS

OUT

Complement clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33

ohm series resistor needed)

29

SRC0T_LPRS

OUT

True clock of low power differential SRC clock pair. (no 50ohm shunt resistor to GND and no 33 ohm

series resistor needed)

30

*CLKREQ0#

IN

Clock Request pin for SRC0 outputs. If output is selected for control, then that output is controlled as

follows:

0 = enabled, 1 = Low-Low

31

GNDATIG

GND

Ground pin for the ATIG outputs

32

VDDATIG_IO

PWR

Power supply for differential ATIG outputs, nominal 1.05V to 3.3V