TMS320F2812 datasheet(2/170 Pages) TI

2 / 170 page

TMS320F2810, TMS320F2811, TMS320F2812

TMS320C2810, TMS320C2811, TMS320C2812

SPRS174S – APRIL 2001 – REVISED MARCH 2011

www.ti.com

Contents

TMS320F281x, TMS320C281x DSPs

..................................................................................... 11

1.1

Features

.................................................................................................................... 11

1.2

Getting Started

............................................................................................................. 12

Introduction

...................................................................................................................... 13

2.1

Description

................................................................................................................. 13

2.2

Device Summary

.......................................................................................................... 14

2.3

Pin Assignments

........................................................................................................... 15

2.3.1

Terminal Assignments for the GHH/ZHH Packages

....................................................... 15

2.3.2

Pin Assignments for the PGF Package

...................................................................... 16

2.3.3

Pin Assignments for the PBK Package

...................................................................... 17

2.4

Signal Descriptions

........................................................................................................ 18

Functional Overview

.......................................................................................................... 27

3.1

Memory Map

............................................................................................................... 28

3.2

Brief Descriptions

.......................................................................................................... 33

3.2.1

C28x CPU

....................................................................................................... 33

3.2.2

Memory Bus (Harvard Bus Architecture)

.................................................................... 33

3.2.3

Peripheral Bus

.................................................................................................. 33

3.2.4

Real-Time JTAG and Analysis

................................................................................ 33

3.2.5

External Interface (XINTF) (2812 Only)

...................................................................... 34

3.2.6

Flash (F281x Only)

............................................................................................. 34

3.2.7

ROM (C281x Only)

............................................................................................. 34

3.2.8

M0, M1 SARAMs

............................................................................................... 34

3.2.9

L0, L1, H0 SARAMs

............................................................................................ 35

3.2.10

Boot ROM

....................................................................................................... 35

3.2.11

Security

.......................................................................................................... 35

3.2.12

Peripheral Interrupt Expansion (PIE) Block

................................................................. 36

3.2.13

External Interrupts (XINT1, XINT2, XINT13, XNMI)

........................................................ 36

3.2.14

Oscillator and PLL

.............................................................................................. 37

3.2.15

Watchdog

........................................................................................................ 37

3.2.16

Peripheral Clocking

............................................................................................. 37

3.2.17

Low-Power Modes

.............................................................................................. 37

3.2.18

Peripheral Frames 0, 1, 2 (PFn)

.............................................................................. 37

3.2.19

General-Purpose Input/Output (GPIO) Multiplexer

......................................................... 38

3.2.20

32-Bit CPU-Timers (0, 1, 2)

................................................................................... 38

3.2.21

Control Peripherals

............................................................................................. 38

3.2.22

Serial Port Peripherals

......................................................................................... 38

3.3

............................................................................................................... 39

3.4

Device Emulation Registers

.............................................................................................. 41

3.5

External Interface, XINTF (2812 Only)

................................................................................. 42

3.5.1

Timing Registers

................................................................................................ 43

3.5.2

XREVISION Register

........................................................................................... 43

3.6

Interrupts

.................................................................................................................... 44

3.6.1

External Interrupts

.............................................................................................. 47

3.7

System Control

............................................................................................................ 48

3.8

OSC and PLL Block

....................................................................................................... 50

Contents

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