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33781 датащи(PDF) 7 Page - Freescale Semiconductor, Inc

номер детали 33781
подробное описание детали  Quad DSI 2.02 Master with
PDF  44 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

33781 датащи(HTML) 7 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
7
33781
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
BUS TRANSMITTER (DnH, DnL)
Output Bus Idle Voltage (Drop)
InH = -200mA, InL = 200mA(6)
VDnD(Drop)
(7)(8)
–
–
1.6
V
Output Signal High Voltage (Differential)
-12.5mA
≤ InH ≤ 1.0mA, -1.0mA ≤ InL ≤ 12.5mA (6)
VDnD(HIGH)
(7)
4.175
4.5
4.825
V
Output Signal Low Voltage (Differential)
-12.5mA
≤ InH ≤ 1.0mA, -1.0mA ≤ InL ≤ 12.5mA(6)
VDnD(LOW)
(7)
1.175
1.5
1.825
V
Vmid, (DnH + DnL)/2 (Voltage Halfway Between Bus High Side and
Bus Low Side
VMID
(8)
VSUPn/
2-0.8
VSUPn/2
VSUPn/
2+0.8
V
VCM Peak to Peak (Maximum Vmid-Minimum Vmid)
For Vmid (Idle), Vmid (Signal_H), Vmid (Signal_L)(5)
VCMP
0
–
30
mV
Bus Driver Vmid Peak to Peak, (DnH+DnL)/2(5)
For Signal to Idle, Idle, Idle to Signal,
VmidPP(Idle)=Vmid(Max)- Vmid (Min)
VMIDPP(IDLE)
–
–
300
mV
Bus Driver Vmid Peak to Peak (Dnh+DnL)/2(5)
For Signal_H to Signal_L, Signal_L, Signal_L to Signal_H, Signal_H
VmidPP(Signal)=Vmid(Max)-Vmid(Min)
VMIDPP(SIGNAL)
–
–
80
mV
Output High Side (DnH) Driver Current Limit
Fault Condition: DnH = 0V
Normal Operation
Fault Condition: DnH = VSUPn
ICL(HIGH)
-600
-400
150
–
–
–
-200
-200
350
mA
Output Low Side (DnL) Driver Current Limit
Fault Condition: DnL = 0V
Fault Condition: DnL = VSUPn
ICL(LOW)
-350
200
–
–
-150
400
mA
Signal mode Over-current Shutdown
l ISSD l DnH, DnL
ISSD
20
60
mA
Disabled High Side (DnH) Bus Leakage (DnL open)
DnH = 0V
DnH = VSUPn
ILK(HIGH)
-1.0
-1.0
–
–
1.0
1.0
mA
Disabled Low Side (DnL) Bus Leakage (DnH open)(9)
DnL = 0V
DnL = VSUPn
ILK(LOW)
-1.0
-1.0
–
–
1.0
1.0
mA
Notes
5.
Not measured in production.
6.
InH=bus current at DnH, InL=bus current at DnL
7.
VDnD=VDnH-VDnL
8.
Max VDnD = VSUPn - 2 * VMID_OFFSET - VDnD(Drop), VMID_OFFSET = |VMID - VSUPn / 2|
9.
Worst Case Disabled Low Side Bus Leakage for DnL occurs with DnL = VSUP and DnH = 0V. In this configuration, the DnL leakage
current can exceed 1mA. This is not measured in production.
Table 3. Static Electrical Characteristics (continued)
Characteristics noted under conditions 4.75V
≤ VCC ≤ 5.25V, 9.0V ≤ VSUPn ≤ 25V,-40°C ≤ TA ≤ 90°C, unless otherwise
noted. Voltages relative to GND, unless otherwise noted. Typical values noted reflect the approximate mean values of the
parameter at TA = 25°C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit



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