MSC8156 datasheet(27/68 Pages) FREESCALE

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Electrical Characteristics

MSC8156 Six-Core Digital Signal Processor Data Sheet, Rev. 1

Freescale Semiconductor

2.5.1.3

DDR2/DDR3 SDRAM Capacitance

Table 8 provides the DDR controller interface capacitance for DDR2 and DDR3 memory.

Note:

At recommended operating conditions (see Table 3) with VDDDDR = 1.8 V for DDR2 memory or VDDDDR =1.5 V for

DDR3 memory.

2.5.1.4

DDR Reference Current Draw

Table 9 lists the current draw characteristics for MVREF.

Note:

Values when used at recommended operating conditions (see Table 3).

2.5.2

High-Speed Serial Interface (HSSI) DC Electrical Characteristics

The MSC8156 features an HSSI that includes two 4-channel SerDes ports used for high-speed serial interface applications (PCI

Express, Serial RapidIO interfaces, and SGMII). This section and its subsections describe the common portion of the SerDes

DC, including the DC requirements for the SerDes reference clocks and the SerDes data lane transmitter (Tx) and receiver (Rx)

reference circuits. The data lane circuit specifications are specific for each supported interface, and they have individual

subsections by protocol. The selection of individual data channel functionality is done via the Reset Configuration Word High

Section 2.6.2, “HSSI AC Timing Specifications.”

2.5.2.1

Signal Term Definitions

The SerDes interface uses differential signaling to transfer data across the serial link. This section defines terms used in the

description and specification of differential signals. Figure 4 shows how the signals are defined. For illustration purposes only,

one SerDes lane is used in the description. Figure 4 shows the waveform for either a transmitter output (SR[1–2]_TX and

Table 8. DDR2/DDR3 SDRAM Capacitance

Parameter

Symbol

Min

Max

Unit

Notes

I/O capacitance: DQ, DQS, DQS

CIO

1, 2

Delta I/O capacitance: DQ, DQS, DQS

CDIO

—

0.5

1, 2

Notes:

This parameter is sampled. VDDDDR = 1.8 V ± 0.1 V (for DDR2), f = 1 MHz, TA = 25°C, VOUT = VDDDDR/2,

VOUT (peak-to-peak) = 0.2 V.

This parameter is sampled. VDDDDR = 1.5 V ± 0.075 V (for DDR3), f = 1 MHz, TA = 25°C, VOUT = VDDDDR/2,

VOUT (peak-to-peak) = 0.175 V.

Table 9. Current Draw Characteristics for MVREF

Parameter / Condition

Symbol

Min

Max

Unit

Current draw for MVREFn

• DDR2 SDRAM

• DDR3 SDRAM

IMVREFn

—

300

250

μA

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