IXP45X datasheet(144/148 Pages) INTEL

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Intel® IXP45X and Intel® IXP46X Product Line of Network Processors—Datasheet

Intel® IXP45X and Intel® IXP46X Product Line of Network Processors

Datasheet

August 2006

144

Document Number: 306261-004US

5.6.3

Reset Timings

The IXP45X/IXP46X network processors can be reset in any of the following three

modes:

•Cold Reset

•Warm Reset

• Soft Reset.

Normally, a Cold Reset is executed each time power is initially applied to the board, a

Warm Reset is executed when it is only intended to reset the IXP45X/IXP46X network

processors, and a Soft Reset is executed by the watchdog timer.

5.6.3.1

Cold Reset

A Cold Reset condition is when the network processor is initially powered-up and has

successfully come out of the Reset. During this state all internal modules and registers

are set to the initial default state. To successfully come out of reset, two things must

occur:

• Proper power sequence as described in Section 5.7

Figure 48.

Boundary-Scan Reset Timings

Table 80.

Boundary-Scan Interface Timings Values

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Units

Notes

Tbscl

JTG_TCK low time

Tbsch

JTG_TCK high time

Tbsis

JTG_TDI, JTG_TMS setup time to

rising edge of JTG_TCK

Tbsih

JTG_TDI, JTG_TMS hold time from

rising edge of JTG_TCK

Tbsoh

JTG_TDO hold time after falling

edge of JTG_TCK

1.5

Tbsod

JTG_TDO clock to output from

falling edge of JTG_TCK

Tbsr

JTG_TRST_N reset period

Tbsrs

JTG_TMS setup time to rising edge

of JTG_TRST_N

Tbsrh

JTG_TMS hold time from rising

edge of JTG_TRST_N

Notes:

Tests completed with a 40-pF load to ground on JTAG_TDO.

JTG_TCK may be stopped indefinitely in either the low or high phase.

A9597-01

Tbsr

Tbsrs Tbsrh

JTG_TRST_N

JTG_TMS

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