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MC68HC705P9CS датащи(PDF) 105 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS датащи(HTML) 105 Page - Freescale Semiconductor, Inc |
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105 / 160 page ![]() Timer Timing MC68HC705P9 — Rev. 4.0 Technical Data MOTOROLA Timer 105 9.5 Timing Figure 9-5. Input Capture Characteristics Table 9-1. Timer Characteristics (V DD = 5.0 Vdc) (1) 1. VDD = 5.0 Vdc ± 10%, TA = TL to TH unless otherwise noted. Characteristic Symbol Min Max Unit Timer Resolution(2) 2. A 2-bit prescaler in the timer is the limiting factor as it counts 4 tCYC. tRESL 4.0 — tCYC Input Capture Pulse Width tH, tL 125 — ns Input Capture Pulse Period tTLTL Note (3) 3. The minimum tTLTL should not be less than the number of interrupt service routine cycles plus 19 tCYC. — tCYC Table 9-2. Timer Characteristics (V DD = 3.3 Vdc) (1) 1. VDD = 3.3 Vdc ± 10%, TA = TL to TH unless otherwise noted. Characteristic Symbol Min Max Unit Timer Resolution(2) 2. A 2-bit prescaler in the timer is the limiting factor as it counts 4 tCYC. tRESL 4.0 — tCYC Input Capture Pulse Width tH, tL 250 — ns Input Capture Pulse Period tTLTL Note (3) 3. The minimum tTLTL should not be less than the number of interrupt service routine cycles plus 19 tCYC. — tCYC tTLTL tTH tTL Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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