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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MC68HC705P9CS датащи(PDF) 56 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS датащи(HTML) 56 Page - Freescale Semiconductor, Inc |
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56 / 160 page  Central Processor Unit (CPU) Technical Data MC68HC705P9 — Rev. 4.0 56 Central Processor Unit (CPU) MOTOROLA 4.7.2.4 Bit Manipulation Instructions The CPU can set or clear any writable bit in the first 256 bytes of memory, which includes I/O registers and on-chip RAM locations. The CPU can also test and branch based on the state of any bit in any of the first 256 memory locations. Branch if Interrupt Mask Clear BMC Branch if Minus BMI Branch if Interrupt Mask Set BMS Branch if Not Equal BNE Branch if Plus BPL Branch Always BRA Branch if Bit Clear BRCLR Branch Never BRN Branch if Bit Set BRSET Branch to Subroutine BSR Unconditional Jump JMP Jump to Subroutine JSR Table 4-3. Jump and Branch Instructions (Continued) Instruction Mnemonic Table 4-4. Bit Manipulation Instructions Instruction Mnemonic Bit Clear BCLR Branch if Bit Clear BRCLR Branch if Bit Set BRSET Bit Set BSET Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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