SPMC68CK338CPV14 datasheet(35/133 Pages) FREESCALE

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MC68CK338

MOTOROLA

MC68CK338TS/D

ADDR[23:11] — Base Address Field

This field sets the starting address of a particular chip-select’s address space. The address compare

logic uses only the most significant bits to match an address within a block. The value of the base ad-

dress must be a multiple of the block size. The base address register diagrams above show how register

bits correspond to CPU address lines.

BLKSZ[2:0] — Block Size Field

This field determines the size of the block that must be enabled by the chip-select. Table 23 shows bit

encoding for the base address registers block size field.

3.6.4 Option Registers

The option registers contain eight fields that determine timing of and conditions for assertion of chip-

select signals. To assert a chip-select signal, and to provide DSACK or autovector support, other con-

straints set by fields in the option register and in the base address register must also be satisfied.

CSBAR[0:10] — Chip-Select Base Address Registers

$YFFA4C–$YFFA74

ADDR

BLKSZ[2:0]

RESET:

Table 23 Block Size Field Bit Encoding

Block Size

Field

Block Size

Address Lines Compared

000

2 Kbyte

ADDR[23:11]

001

8 Kbyte

ADDR[23:13]

010

16 Kbyte

ADDR[23:14]

011

64 Kbyte

ADDR[23:16]

100

128 Kbyte

ADDR[23:17]

101

256 Kbyte

ADDR[23:18]

110

512 Kbyte

ADDR[23:19]

111

1 Mbyte

ADDR[23:20]

CSORBT — Chip-Select Option Register Boot ROM

$YFFA4A

MODE

BYTE[1:0]

R/W[1:0]

STRB

DSACK[3:0]

SPACE[1:0]

IPL[2:0]

AVEC

RESET:

CSOR[0:10] — Chip-Select Option Registers

$YFFA4E–YFFA76

MODE

BYTE[1:0]

R/W[1:0]

STRB

DSACK[3:0]

SPACE[1:0]

IPL[2:0]

AVEC

RESET:

Freescale Semiconductor, Inc.

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