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SC312XDP512F0MPVR датащи(PDF) 997 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 997 Page - Freescale Semiconductor, Inc |
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997 / 1348 page ![]() 24.0.5.10 IRQ Control Register (IRQCR) Read: See individual bit descriptions below. Write: See individual bit descriptions below. 24.0.5.11 Port K Data Register (PORTK) Read: Anytime. Write: Anytime. Table 24-13. Free-Running ECLK Clock Rate EDIV[1:0] Rate of Free-Running ECLK 00 ECLK = Bus clock rate 01 ECLK = Bus clock rate divided by 2 10 ECLK = Bus clock rate divided by 3 11 ECLK = Bus clock rate divided by 4 76543210 R IRQE IRQEN 000000 W Reset 01000000 = Unimplemented or Reserved Figure 24-12. IRQ Control Register (IRQCR) Table 24-14. IRQCR Field Descriptions Field Description 7 IRQE IRQ Select Edge Sensitive Only Special modes: Read or write anytime. Normal and emulation modes: Read anytime, write once. 0 IRQ configured for low level recognition. 1 IRQ configured to respond only to falling edges. Falling edges on the IRQ pin will be detected anytime IRQE = 1 and will be cleared only upon a reset or the servicing of the IRQ interrupt. 6 IRQEN External IRQ Enable Read or write anytime. 0 External IRQ pin is disconnected from interrupt logic. 1 External IRQ pin is connected to interrupt logic. 76543210 R PK7 0 PK5 PK4 PK3 PK2 PK1 PK0 W Reset 00000000 Figure 24-13. Port K Data Register (PORTK) |
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