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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC312XDP512F0MPVR датащи(PDF) 838 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 838 Page - Freescale Semiconductor, Inc |
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838 / 1348 page  Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2) MC9S12XDP512 Data Sheet, Rev. 2.21 840 Freescale Semiconductor 22.3.2.17 Port T Data Register (PTT) Read: Anytime. Write: Anytime. 22.3.2.18 Port T Input Register (PTIT) Read: Anytime. Write: Never, writes to this register have no effect. 76543210 R PTT7 PTT6 PTT5 PTT4 PTT3 PTT2 PTT1 PTT0 W ECT IOC7 IOC6 IOC5 IOC4 IOC3 IOC2 IOC1 IOC0 Reset 00000000 Figure 22-19. Port T Data Register (PTT) Table 22-21. PTT Field Descriptions Field Description 7–0 PTT[7:0] Port T — Port T bits 7–0 are associated with ECT channels IOC7–IOC0 (refer to ECT section). When not used with the ECT, these pins can be used as general purpose I/O. If the data direction bits of the associated I/O pins are set to logic level “1”, a read returns the value of the port register, otherwise the buffered pin input state is read. 76543210 R PTIT7 PTIT6 PTIT5 PTIT4 PTIT3 PTIT2 PTIT1 PTIT0 W Reset1 1 These registers are reset to zero. Two bus clock cycles after reset release the register values are updated with the associated pin values. ———————— = Unimplemented or Reserved Figure 22-20. Port T Input Register (PTIT) Table 22-22. PTIT Field Descriptions Field Description 7–0 PTIT[7:0] Port T Input — This register always reads back the buffered state of the associated pins. This can also be used to detect overload or short circuit conditions on output pins. |
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