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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC312XDP512F0MPVR датащи(PDF) 837 Page - Freescale Semiconductor, Inc |
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SC312XDP512F0MPVR датащи(HTML) 837 Page - Freescale Semiconductor, Inc |
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837 / 1348 page  Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 839 Table 22-20. DDRK Field Descriptions Field Description 7–0 DDRK[7:0] Data Direction Port K 0 Associated pin is configured as input. 1 Associated pin is configured as output. Note: Due to internal synchronization circuits, it can take up to 2 bus clock cycles until the correct value is read on PORTK after changing the DDRK register. |
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