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SC312XDP512F0MPVR датащи(PDF) 834 Page - Freescale Semiconductor, Inc

номер детали SC312XDP512F0MPVR
подробное описание детали  HCS12X Microcontrollers
PDF  1348 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
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SC312XDP512F0MPVR датащи(HTML) 834 Page - Freescale Semiconductor, Inc

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Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
836
Freescale Semiconductor
22.3.2.13 ECLK Control Register (ECLKCTL)
Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other
modes the data are read from this register.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
The ECLKCTL register is used to control the availability of the free-running clocks and the free-running
clock divider.
76543210
R
NECLK
NCLKX2
0000
EDIV1
EDIV0
W
Reset1
1 Reset values in emulation modes are identical to those of the target mode.
Mode
Dependent
1000000
Mode
SS
01000000
Special
Single-Chip
ES
11000000
Emulation
Single-Chip
ST
01000000
Special
Test
EX
01000000
Emulation
Expanded
NS
11000000
Normal
Single-Chip
NX
01000000
Normal
Expanded
= Unimplemented or Reserved
Figure 22-15. ECLK Control Register (ECLKCTL)
Table 22-16. ECLKCTL Field Descriptions
Field
Description
7
NECLK
No ECLK — This bit controls the availability of a free-running clock on the ECLK pin. Clock output is always
active in emulation modes and if enabled in all other operating modes.
0 ECLK enabled
1 ECLK disabled



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