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PIC18F23K20 датащи(PDF) 28 Page - Microchip Technology |
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PIC18F23K20 датащи(HTML) 28 Page - Microchip Technology |
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28 / 456 page ![]() PIC18F2XK20/4XK20 DS41303G-page 28 2010 Microchip Technology Inc. 2.2 Oscillator Control The OSCCON register (Register 2-1) controls several aspects of the device clock’s operation, both in full power operation and in power-managed modes. • Main System Clock Selection (SCS) • Internal Frequency selection bits (IRCF) • Clock Status bits (OSTS, IOFS) • Power management selection (IDLEN) 2.2.1 MAIN SYSTEM CLOCK SELECTION The System Clock Select bits, SCS<1:0>, select the main clock source. The available clock sources are • Primary clock defined by the FOSC<3:0> bits of CONFIG1H. The primary clock can be the primary oscillator, an external clock, or the internal oscilla- tor block. • Secondary clock (Timer1 oscillator) • Internal oscillator block (HFINTOSC and LFINTOSC). The clock source changes immediately after one or more of the bits is written to, following a brief clock tran- sition interval. The SCS bits are cleared to select the primary clock on all forms of Reset. 2.2.2 INTERNAL FREQUENCY SELECTION The Internal Oscillator Frequency Select bits (IRCF<2:0>) select the frequency output of the internal oscillator block. The choices are the LFINTOSC source (31 kHz), the HFINTOSC source (16 MHz) or one of the frequencies derived from the HFINTOSC post- scaler (31.25 kHz to 8 MHz). If the internal oscillator block is supplying the main clock, changing the states of these bits will have an immediate change on the internal oscillator’s output. On device Resets, the out- put frequency of the internal oscillator is set to the default frequency of 1 MHz. 2.2.3 LOW FREQUENCY SELECTION When a nominal output frequency of 31 kHz is selected (IRCF<2:0> = 000), users may choose which internal oscillator acts as the source. This is done with the INTSRC bit of the OSCTUNE register. Setting this bit selects the HFINTOSC as a 31.25 kHz clock source by enabling the divide-by-512 output of the HFINTOSC postscaler. Clearing INTSRC selects LFINTOSC (nom- inally 31 kHz) as the clock source. This option allows users to select the tunable and more precise HFINTOSC as a clock source, while maintain- ing power savings with a very low clock speed. Regard- less of the setting of INTSRC, LFINTOSC always remains the clock source for features such as the Watchdog Timer and the Fail-Safe Clock Monitor. 2.2.4 CLOCK STATUS The OSTS and IOFS bits of the OSCCON register, and the T1RUN bit of the T1CON register, indicate which clock source is currently providing the main clock. The OSTS bit indicates that the Oscillator Start-up Timer has timed out and the primary clock is providing the device clock. The IOFS bit indicates when the internal oscillator block has stabilized and is providing the device clock in HFINTOSC Clock modes. The IOFS and OSTS Status bits will both be set when SCS<1:0> = 00 and HFINTOSC is the primary clock. The T1RUN bit indicates when the Timer1 oscillator is providing the device clock in secondary clock modes. When SCS<1:0> 00, only one of these three bits will be set at any time. If none of these bits are set, the LFINTOSC is providing the clock or the HFINTOSC has just started and is not yet stable. 2.2.5 POWER MANAGEMENT The IDLEN bit of the OSCCON register determines if the device goes into Sleep mode or one of the Idle modes when the SLEEP instruction is executed. The use of the flag and control bits in the OSCCON register is discussed in more detail in Section 3.0 “Power-Managed Modes”. Note 1: The Timer1 oscillator must be enabled to select the secondary clock source. The Timer1 oscillator is enabled by setting the T1OSCEN bit of the T1CON register. If the Timer1 oscillator is not enabled, then the main oscillator will continue to run from the previously selected source. The source will then switch to the secondary oscillator after the T1OSCEN bit is set. 2: It is recommended that the Timer1 oscillator be operating and stable before selecting the secondary clock source or a very long delay may occur while the Timer1 oscillator starts. |
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