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CS61884 датащи(PDF) 14 Page - Cirrus Logic |
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CS61884 датащи(HTML) 14 Page - Cirrus Logic |
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14 / 71 page ![]() CS61884 14 DS485F1 3.3 Address Inputs/Loopbacks SYMBOL LQFP FBGA TYPE DESCRIPTION A4 12 F4 I Address Selector Input Parallel Host Mode - During non-multiplexed parallel host mode operation, this pin function as the address 4 input for the parallel interface. Hardware Mode - The A4 pin must be tied low at all times. A3 A2 A1 A0 13 14 15 16 F3 F2 F1 G3 I I I I Non-Intrusive Monitoring/Address Selector Inputs Parallel Host Mode - During non-multiplexed parallel host mode operation, these pins function as address A[3:0] in- puts for the parallel interface. Hardware Mode - The A[3:0] pins are used for port selec- tion during non-intrusive monitoring. In non-intrusive monitoring mode, receiver 0’s input is internally connected to the transmit or receive ports on one of the other 7 chan- nels. The recovered clock and data from the selected port are output on RPOS0/RNEG0 and RCLK0. Additionally, the data from the selected port can be output on TTIP0/TRING0 by activating the remote loopback function for channel 0 (Refer to Performance Monitor Register (0Bh) (See Section 14.12 on page 36). LOOP0/D0 LOOP1/D1 LOOP2/D2 LOOP3/D3 LOOP4/D4 LOOP5/D5 LOOP6/D6 LOOP7/D7 21 22 23 24 25 26 27 28 G2 H3 H2 J4 J3 J2 J1 K1 I/O I/O I/O I/O I/O I/O I/O I/O Loopback Mode Selector/Parallel Data Input/Output Parallel Host Mode - In non-multiplexed microprocessor in- terface mode, these pins function as the bi-directional 8-bit data port. When operating in multiplexed microprocessor in- terface mode, these pins function as the address and data inputs/outputs. Hardware Mode - No Loopback - The CS61884 is in a normal operating state when LOOP is left open (unconnected) or tied to VCCIO/2. - Local Loopback - When LOOP is tied High, data transmit- ted on TTIP and TRING is looped back into the analog input of the corresponding channel’s receiver and output on RPOS and RNEG. Input Data present on RTIP and RRING is ignored. - Remote Loopback - When LOOP is tied Low the recov- ered clock and data received on RTIP and RRING is looped back for transmission on TTIP and TRING. Data on TPOS and TNEG is ignored. |
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