WM2633

Production Data

WOLFSON MICROELECTRONICS LTD

PD Rev 1.0 July 1999

6

supply current will increase.

9. Typical supply current in powerdown mode is 10nA. Production test limits are wider for speed of test.

10. Slew rate results are for the lower value of the rising and falling edge slew rates.

11. Settling time is the time taken for the signal to settle to within 0.5LSB of the final measured value for both rising and

falling edges. Limits are ensured by design and characterisation, but are not production tested.

PARALLEL INTERFACE

D[0-7]

A[0-1]

NCS

NWE

NLDAC

Data

X

X

Address

X

X

t

SUD

t

HD

t

SUA

t

SUCSWE

t

WWE

t

SUWELD

t

WLD

t

HA

Figure 1 Timing Diagram

SYMBOL

TEST

CONDITIONS

MIN

TYP

MAX

UNIT

Setup time NCS low before positive NWE edge

15

ns

Data ready before positive NWE edge

10

ns

Data hold after positive NWE edge

5ns

Setup time for address bits A0, A1

20

ns

Positive NWE edge before NLDAC low

5ns

High pulse width of NWE

20

ns

Low pulse width of NLDAC

23

ns