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ATmega328P датащи(PDF) 239 Page - ATMEL Corporation |
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ATmega328P датащи(HTML) 239 Page - ATMEL Corporation |
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239 / 448 page ![]() 239 8161D–AVR–10/09 ATmega48PA/88PA/168PA/328P Figure 21-18. Formats and States in the Slave Transmitter Mode 21.7.5 Miscellaneous States There are two status codes that do not correspond to a defined TWI state, see Table 21-6. Status 0xF8 indicates that no relevant information is available because the TWINT Flag is not set. This occurs between other states, and when the TWI is not involved in a serial transfer. Status 0x00 indicates that a bus error has occurred during a 2-wire Serial Bus transfer. A bus error occurs when a START or STOP condition occurs at an illegal position in the format frame. Examples of such illegal positions are during the serial transfer of an address byte, a data byte, or an acknowledge bit. When a bus error occurs, TWINT is set. To recover from a bus error, the TWSTO Flag must set and TWINT must be cleared by writing a logic one to it. This causes the TWI to enter the not addressed Slave mode and to clear the TWSTO Flag (no other bits in TWCR are affected). The SDA and SCL lines are released, and no STOP condition is transmitted. 21.7.6 Combining Several TWI Modes In some cases, several TWI modes must be combined in order to complete the desired action. Consider for example reading data from a serial EEPROM. Typically, such a transfer involves the following steps: 1. The transfer must be initiated. 2. The EEPROM must be instructed what location should be read. 3. The reading must be performed. 4. The transfer must be finished. S SLA R A DATA A $A8 $B8 A $B0 Reception of the own slave address and one or more data bytes Last data byte transmitted. Switched to not addressed slave (TWEA = '0') Arbitration lost as master and addressed as slave n From master to slave From slave to master Any number of data bytes and their associated acknowledge bits This number (contained in TWSR) corresponds to a defined state of the 2-Wire Serial Bus. The prescaler bits are zero or masked to zero P or S DATA $C0 DATA A A $C8 P or S All 1's A Table 21-6. Miscellaneous States Status Code (TWSR) Prescaler Bits are 0 Status of the 2-wire Serial Bus and 2-wire Serial Interface Hardware Application Software Response Next Action Taken by TWI Hardware To/from TWDR To TWCR STA STO TWIN T TWE A 0xF8 No relevant state information available; TWINT = “0” No TWDR action No TWCR action Wait or proceed current transfer 0x00 Bus error due to an illegal START or STOP condition No TWDR action 0 1 1 X Only the internal hardware is affected, no STOP condi- tion is sent on the bus. In all cases, the bus is released and TWSTO is cleared. |
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