ATmega325P datasheet(137/364 Pages) ATMEL

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137

8023F–AVR–07/09

ATmega325P/3250P

16.4

Counter Unit

The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit. Figure

16-2 shows a block diagram of the counter and its surrounding environment.

Figure 16-2. Counter Unit Block Diagram

Signal description (internal signals):

count

Increment or decrement TCNT2 by 1.

direction

Selects between increment and decrement.

clear

Clear TCNT2 (set all bits to zero).

clk

Timer/Counter clock.

top

Signalizes that TCNT2 has reached maximum value.

bottom

Signalizes that TCNT2 has reached minimum value (zero).

Depending on the mode of operation used, the counter is cleared, incremented, or decremented

at each timer clock (clk

T2). clkT2 can be generated from an external or internal clock source,

selected by the Clock Select bits (CS22:0). When no clock source is selected (CS22:0 = 0) the

timer is stopped. However, the TCNT2 value can be accessed by the CPU, regardless of

whether clk

T2 is present or not. A CPU write overrides (has priority over) all counter clear or

count operations.

The counting sequence is determined by the setting of the WGM21 and WGM20 bits located in

the Timer/Counter Control Register (TCCR2A). There are close connections between how the

counter behaves (counts) and how waveforms are generated on the Output Compare output

OC2A. For more details about advanced counting sequences and waveform generation, see

”Modes of Operation” on page 140.

The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation selected by

the WGM21:0 bits. TOV2 can be used for generating a CPU interrupt.

16.5

Output Compare Unit

The 8-bit comparator continuously compares TCNT2 with the Output Compare Register

(OCR2A). Whenever TCNT2 equals OCR2A, the comparator signals a match. A match will set

the Output Compare Flag (OCF2A) at the next timer clock cycle. If enabled (OCIE2A = 1), the

Output Compare Flag generates an Output Compare interrupt. The OCF2A Flag is automatically

cleared when the interrupt is executed. Alternatively, the OCF2A Flag can be cleared by soft-

ware by writing a logical one to its I/O bit location. The Waveform Generator uses the match

signal to generate an output according to operating mode set by the WGM21:0 bits and Com-

pare Output mode (COM2A1:0) bits. The max and bottom signals are used by the Waveform

DATA BUS

TCNTn

Control Logic

count

TOVn

(Int.Req.)

top

bottom

direction

clear

TOSC1

T/C

Oscillator

TOSC2

Prescaler

clk

I/O

clk

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